Lines Matching defs:mclkcfg
763 uint64_t timing1,timing2,mclkcfg,drvcfg,dllcfg;
1354 mclkcfg = V_BCM1480_MC_CLK_RATIO(i) |
1356 WRITECSR(base+R_BCM1480_MC_MCLK_CFG,mclkcfg);
1363 mclkcfg = V_BCM1480_MC_CLK_RATIO(clk_ratio) |
1370 mclkcfg |= M_BCM1480_MC_AUTO_REF_DIS;
1372 WRITECSR(base+R_BCM1480_MC_MCLK_CFG,mclkcfg);
1384 WRITECSR(base+R_BCM1480_MC_MCLK_CFG,mclkcfg);
1413 uint64_t timing1, mclkcfg, drvcfg;
1471 mclkcfg = V_BCM1480_MC_CLK_RATIO(i) |
1473 WRITECSR(base+R_BCM1480_MC_MCLK_CFG,mclkcfg);
1477 mclkcfg = V_BCM1480_MC_CLK_RATIO(clk_ratio) |
1480 WRITECSR(base+R_BCM1480_MC_MCLK_CFG,mclkcfg);
1504 WRITECSR(base+R_BCM1480_MC_MCLK_CFG,mclkcfg);
2175 sbport_t cmd, mclkcfg;
2187 mclkcfg = (sbport_t) PHYS_TO_K1(A_BCM1480_MC_REGISTER(mcnum,R_BCM1480_MC_MCLK_CFG));
2188 clk_ratio = G_BCM1480_MC_CLK_RATIO(READCSR(mclkcfg));
2488 mclkcfgbits = READCSR(mclkcfg);
2490 WRITECSR(mclkcfg, mclkcfgbits);