Lines Matching defs:st
14 void cm2_enable_hsmmc1(struct cm2_driver_state* st)
16 omap44xx_l3init_cm2_cm_l3init_clkstctrl_clktrctrl_wrf(&st->l3init_cm2, 0x2);
17 omap44xx_l3init_cm2_cm_l3init_hsmmc1_clkctrl_modulemode_wrf(&st->l3init_cm2, 0x2);
18 while (omap44xx_l3init_cm2_cm_l3init_hsmmc1_clkctrl_idlest_rdf(&st->l3init_cm2) != 0x0);
21 void cm2_enable_i2c(struct cm2_driver_state* st, size_t i2c_index)
25 omap44xx_l4per_cm2_cm_l4per_i2c_clkctrl_modulemode_wrf(&st->l4per_cm2, i2c_index, 0x2);
26 while (omap44xx_l4per_cm2_cm_l4per_i2c_clkctrl_idlest_rdf(&st->l4per_cm2, i2c_index)
30 void cm2_init(struct cm2_driver_state* st)
33 errval_t err = map_device_cap(st->cap, &l3init_vaddr);
35 omap44xx_l3init_cm2_initialize(&st->l3init_cm2, (mackerel_addr_t)l3init_vaddr);
36 omap44xx_l4per_cm2_initialize(&st->l4per_cm2, (mackerel_addr_t)l3init_vaddr);
39 int cm2_get_hsmmc1_base_clock(struct cm2_driver_state* st)
41 return omap44xx_l3init_cm2_cm_l3init_hsmmc1_clkctrl_clksel_rdf(&st->l3init_cm2) == 0x0 ?