Lines Matching refs:channel
28 ioat_dma_chan_t channel; ///< Mackerel address
33 uint64_t status; ///< channel status
37 * \brief sets the star of the descriptor chain address of the DMA channel
39 * \param chan IOAT DMA channel
48 ioat_dma_chan_chainaddr_lo_wr(&chan->channel, (uint32_t) chain_addr);
49 ioat_dma_chan_chainaddr_hi_wr(&chan->channel, chain_addr >> 32);
53 * \brief reads the channel status and returns the physical address of the last
56 * \param chan IOAT DMA channel
68 * \brief checks if the channel has completed descriptors which can be processed
71 * \param chan IOAT DMA channel
87 * \brief processes the completed descriptors of a DMA channel and finishes
90 * \param chan IAOT DMA channel
167 * \brief initializes and allocates resources for a new channel DMA channel
171 * \param id id of this channel
173 * \param ret_chan returned channel pointer
197 IOATCHAN_DEBUG("initialize channel with max. xfer size of %u bytes\n",
201 ioat_dma_chan_initialize(&chan->channel, chan_base + ((id + 1) * 0x80));
203 ioat_dma_chan_dcactrl_target_cpu_wrf(&chan->channel,
214 ioat_dma_chan_cmpl_lo_wr(&chan->channel, chan->completion.paddr);
215 ioat_dma_chan_cmpl_hi_wr(&chan->channel, chan->completion.paddr >> 32);
239 ioat_dma_chan_ctrl_wr(&chan->channel, chan_ctrl);
249 * do a check if the channel operates correctly by issuing a NOP
251 IOATCHAN_DEBUG("performing selftest on channel with NOP\n", dma_chan->id);
269 IOATCHAN_DEBUG("channel worked properly: %016lx\n", dma_chan->id,
273 IOATCHAN_DEBUG(" channel error ERROR: %08x\n", dma_chan->id,
274 ioat_dma_chan_err_rd(&chan->channel));
287 * \param chan IOAT DMA channel
305 ioat_dma_chan_dmacount_wr(&chan->channel, dmacnt);
326 * \brief Resets a IOAT DMA channel
328 * \param chan IOAT DMA channel to be reset
337 IOATCHAN_DEBUG("reset channel.\n", dma_chan->id);
340 ioat_dma_chan_err_t chanerr = ioat_dma_chan_err_rd(&chan->channel);
341 ioat_dma_chan_err_wr(&chan->channel, chanerr);
342 IOATCHAN_DEBUG("Reseting channel from error state: [%08x]\n",
357 ioat_dma_chan_cmd_reset_wrf(&chan->channel, 0x1);
361 if (!ioat_dma_chan_cmd_reset_rdf(&chan->channel)) {
367 if (ioat_dma_chan_cmd_reset_rdf(&chan->channel)) {
380 * \brief restarts a IOAT DMA channel this updates the chain address register
383 * \param chan IOAT DMA channel
395 * \brief starts a IOAT DMA channel. This sets the chain address to the first
398 * \param chan IOAT DMA channel
413 IOATCHAN_DEBUG("starting channel.\n", chan->common.id);
424 * \param chan IOAT DMA channel
436 * \brief Puts the IOAT DMA channel into the suspended state
438 * \param chan IOAT DMA channel
450 * \brief enqueues a request onto the IOAT DMA channel and submits it to the
453 * \param chan IOAT DMA channel
473 * \brief polls the IOAT DMA channel for completed events
475 * \param chan IOAT DMA channel
478 * DMA_ERR_CHAN_IDLE if there was no request on the channel
491 IOATCHAN_DEBUG("channel is in error state\n", chan->id);
493 ioat_dma_chan_err_pr(buf, 512, &ioat_chan->channel);
494 printf("channel error: %s\n", buf);
527 * \brief returns the associated IOAT DMA descriptor ring of a channel
529 * \param chan IOAT DMA channel
539 * \brief updates the channel status flag by reading the CHANSTS register
541 * \param chan IOAT DMA channel
545 uint32_t status_lo = ioat_dma_chan_sts_lo_rd(&chan->channel);
546 chan->status = ioat_dma_chan_sts_hi_rd(&chan->channel);