sim/frv/profile-fr550.c

419 frvbf_model_fr550_u_exec (SIM_CPU *cpu, const IDESC *idesc,
426 frvbf_model_fr550_u_integer (SIM_CPU *cpu, const IDESC *idesc,
461 frvbf_model_fr550_u_imul (SIM_CPU *cpu, const IDESC *idesc,
499 frvbf_model_fr550_u_idiv (SIM_CPU *cpu, const IDESC *idesc,
554 frvbf_model_fr550_u_branch (SIM_CPU *cpu, const IDESC *idesc,
604 frvbf_model_fr550_u_trap (SIM_CPU *cpu, const IDESC *idesc,
635 frvbf_model_fr550_u_check (SIM_CPU *cpu, const IDESC *idesc,
645 frvbf_model_fr550_u_set_hilo (SIM_CPU *cpu, const IDESC *idesc,
671 frvbf_model_fr550_u_gr_load (SIM_CPU *cpu, const IDESC *idesc,
713 frvbf_model_fr550_u_gr_store (SIM_CPU *cpu, const IDESC *idesc,
744 frvbf_model_fr550_u_fr_load (SIM_CPU *cpu, const IDESC *idesc,
803 frvbf_model_fr550_u_fr_store (SIM_CPU *cpu, const IDESC *idesc,
836 frvbf_model_fr550_u_ici (SIM_CPU *cpu, const IDESC *idesc,
861 frvbf_model_fr550_u_dci (SIM_CPU *cpu, const IDESC *idesc,
886 frvbf_model_fr550_u_dcf (SIM_CPU *cpu, const IDESC *idesc,
911 frvbf_model_fr550_u_icpl (SIM_CPU *cpu, const IDESC *idesc,
936 frvbf_model_fr550_u_dcpl (SIM_CPU *cpu, const IDESC *idesc,
961 frvbf_model_fr550_u_icul (SIM_CPU *cpu, const IDESC *idesc,
986 frvbf_model_fr550_u_dcul (SIM_CPU *cpu, const IDESC *idesc,
1011 frvbf_model_fr550_u_float_arith (SIM_CPU *cpu, const IDESC *idesc,
1088 frvbf_model_fr550_u_float_dual_arith (SIM_CPU *cpu, const IDESC *idesc,
1203 frvbf_model_fr550_u_float_div (SIM_CPU *cpu, const IDESC *idesc,
1259 frvbf_model_fr550_u_float_sqrt (SIM_CPU *cpu, const IDESC *idesc,
1337 frvbf_model_fr550_u_float_compare (SIM_CPU *cpu, const IDESC *idesc,
1385 frvbf_model_fr550_u_float_dual_compare (SIM_CPU *cpu, const IDESC *idesc,
1440 frvbf_model_fr550_u_float_convert (SIM_CPU *cpu, const IDESC *idesc,
1526 frvbf_model_fr550_u_spr2gr (SIM_CPU *cpu, const IDESC *idesc,
1536 frvbf_model_fr550_u_gr2spr (SIM_CPU *cpu, const IDESC *idesc,
1565 frvbf_model_fr550_u_gr2fr (SIM_CPU *cpu, const IDESC *idesc,
1598 frvbf_model_fr550_u_swap (SIM_CPU *cpu, const IDESC *idesc,
1629 frvbf_model_fr550_u_fr2fr (SIM_CPU *cpu, const IDESC *idesc,
1662 frvbf_model_fr550_u_fr2gr (SIM_CPU *cpu, const IDESC *idesc,
1693 frvbf_model_fr550_u_clrgr (SIM_CPU *cpu, const IDESC *idesc,
1702 frvbf_model_fr550_u_clrfr (SIM_CPU *cpu, const IDESC *idesc,
1711 frvbf_model_fr550_u_commit (SIM_CPU *cpu, const IDESC *idesc,
1721 frvbf_model_fr550_u_media (SIM_CPU *cpu, const IDESC *idesc,
1773 frvbf_model_fr550_u_media_quad (SIM_CPU *cpu, const IDESC *idesc,
1839 frvbf_model_fr550_u_media_dual_expand (SIM_CPU *cpu, const IDESC *idesc,
1896 frvbf_model_fr550_u_media_3_dual (SIM_CPU *cpu, const IDESC *idesc,
1948 frvbf_model_fr550_u_media_3_acc (SIM_CPU *cpu, const IDESC *idesc,
1998 frvbf_model_fr550_u_media_3_acc_dual (SIM_CPU *cpu, const IDESC *idesc,
2058 frvbf_model_fr550_u_media_3_wtacc (SIM_CPU *cpu, const IDESC *idesc,
2106 frvbf_model_fr550_u_media_3_mclracc (SIM_CPU *cpu, const IDESC *idesc,
2166 frvbf_model_fr550_u_media_set (SIM_CPU *cpu, const IDESC *idesc,
2212 frvbf_model_fr550_u_media_4 (SIM_CPU *cpu, const IDESC *idesc,
2288 frvbf_model_fr550_u_media_4_acc (SIM_CPU *cpu, const IDESC *idesc,
2338 frvbf_model_fr550_u_media_4_acc_dual (SIM_CPU *cpu, const IDESC *idesc,
2402 frvbf_model_fr550_u_media_4_add_sub (SIM_CPU *cpu, const IDESC *idesc,
2460 frvbf_model_fr550_u_media_4_add_sub_dual (SIM_CPU *cpu, const IDESC *idesc,
2540 frvbf_model_fr550_u_media_4_quad (SIM_CPU *cpu, const IDESC *idesc,