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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/

Lines Matching defs:BO

130      This sets the y bit of the BO field appropriately.  */
142 This sets the y bit of the BO field appropriately. */
172 /* The BO field in a B form instruction. Certain values are
174 #define BO BFA + 1
178 /* The BO field in a B form instruction when the + or - modifier is
179 used. This is like the BO field, but it must be even. */
180 #define BOE BO + 1
634 (ie. not Power4 compatible), we set the y bit of the BO field to 1
641 in BO field, the "a" bit is 00010 for branch on CR(BI) and 01000
734 /* Check for legal values of a BO field. */
793 /* The BO field in a B form instruction. Warn about attempts to set
820 /* The BO field in a B form instruction when the + or - modifier is
821 used. This is like the BO field, but it must be even. When
1309 /* A B form instruction setting the BO field. */
1313 /* A BBO_MASK with the y bit of the BO field removed. This permits
1322 /* A B form instruction setting the BO field and the condition bits of
1328 /* A BBOCB_MASK with the y bit of the BO field removed. */
1506 /* An XL form instruction which explicitly sets the BO field. */
1511 /* An XL form instruction which explicitly sets the y bit of the BO
1516 /* An XL form instruction which sets the BO field and the condition
1530 /* An XL_MASK with the BO and BB fields fixed. */
1533 /* An XL_MASK with the BO, BI and BB fields fixed. */
1587 /* The BO encodings used in extended conditional branch mnemonics. */
2345 { "bce", B(9,0,0), B_MASK, BOOKE64, { BO, BI, BD } },
2346 { "bcel", B(9,0,1), B_MASK, BOOKE64, { BO, BI, BD } },
2347 { "bcea", B(9,1,0), B_MASK, BOOKE64, { BO, BI, BDA } },
2348 { "bcela", B(9,1,1), B_MASK, BOOKE64, { BO, BI, BDA } },
2635 { "bc", B(16,0,0), B_MASK, COM, { BO, BI, BD } },
2638 { "bcl", B(16,0,1), B_MASK, COM, { BO, BI, BD } },
2641 { "bca", B(16,1,0), B_MASK, COM, { BO, BI, BDA } },
2644 { "bcla", B(16,1,1), B_MASK, COM, { BO, BI, BDA } },
2875 { "bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, { BO, BI, BH } },
2876 { "bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, { BO, BI, BH } },
2877 { "bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, { BO, BI } },
2878 { "bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, { BO, BI } },
2879 { "bclre", XLLK(19,17,0), XLBB_MASK, BOOKE64, { BO, BI } },
2880 { "bclrel", XLLK(19,17,1), XLBB_MASK, BOOKE64, { BO, BI } },
3068 { "bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, { BO, BI, BH } },
3069 { "bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, { BO, BI, BH } },
3070 { "bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, { BO, BI } },
3071 { "bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, { BO, BI } },
3072 { "bcctre", XLLK(19,529,0), XLBB_MASK, BOOKE64, { BO, BI } },
3073 { "bcctrel", XLLK(19,529,1), XLBB_MASK, BOOKE64, { BO, BI } },