Lines Matching refs:MODE
498 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
499 if (GET_MODE_CLASS (MODE) == MODE_INT \
500 && GET_MODE_SIZE (MODE) < 4) \
502 if (MODE == QImode) \
504 else if (MODE == HImode) \
506 (MODE) = SImode; \
542 #define UNITS_PER_SIMD_WORD(MODE) \
889 /* The number of (integer) registers required to hold a quantity of type MODE.
891 #define ARM_NUM_REGS(MODE) \
892 ARM_NUM_INTS (GET_MODE_SIZE (MODE))
894 /* The number of (integer) registers required to hold a quantity of TYPE MODE. */
895 #define ARM_NUM_REGS2(MODE, TYPE) \
896 ARM_NUM_INTS ((MODE) == BLKmode ? \
897 int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))
1052 to hold something of mode MODE.
1053 This is ordinarily the length in words of a value of mode MODE
1058 #define HARD_REGNO_NREGS(REGNO, MODE) \
1064 ? 1 : ARM_NUM_REGS (MODE))
1066 /* Return true if REGNO is suitable for holding a quantity of type MODE. */
1067 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
1068 arm_hard_regno_mode_ok ((REGNO), (MODE))
1077 #define VALID_IWMMXT_REG_MODE(MODE) \
1078 (arm_vector_mode_supported_p (MODE) || (MODE) == DImode)
1081 #define VALID_NEON_DREG_MODE(MODE) \
1082 ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
1083 || (MODE) == V2SFmode || (MODE) == DImode)
1086 #define VALID_NEON_QREG_MODE(MODE) \
1087 ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
1088 || (MODE) == V4SFmode || (MODE) == V2DImode)
1091 #define VALID_NEON_STRUCT_MODE(MODE) \
1092 ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
1093 || (MODE) == CImode || (MODE) == XImode)
1264 #define MODE_BASE_REG_CLASS(MODE) \
1266 (((MODE) == SImode) ? BASE_REGS : LO_REGS))
1270 #define MODE_BASE_REG_REG_CLASS(MODE) BASE_REG_CLASS
1289 #define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1292 : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
1296 #define THUMB_SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1299 : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
1304 or out of a register in CLASS in MODE. If it can be done directly,
1306 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1310 ? coproc_secondary_reload_class (MODE, X, FALSE) \
1312 ? coproc_secondary_reload_class (MODE, X, TRUE) \
1314 ? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1) \
1316 : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X))
1319 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1323 ? coproc_secondary_reload_class (MODE, X, FALSE) : \
1325 coproc_secondary_reload_class (MODE, X, TRUE) : \
1335 (((MODE) == HImode && ! arm_arch4 \
1340 : THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)))
1349 #define ARM_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND, WIN) \
1355 && REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \
1361 if (MODE == DImode || (MODE == DFmode && TARGET_SOFT_FLOAT)) \
1366 else if (MODE == SImode \
1367 || (MODE == SFmode && TARGET_SOFT_FLOAT) \
1368 || ((MODE == HImode || MODE == QImode) && ! arm_arch4)) \
1371 else if ((MODE == HImode || MODE == QImode) && arm_arch4) \
1374 else if (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1395 MODE_BASE_REG_CLASS (MODE), GET_MODE (X), \
1411 #define THUMB_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN) \
1413 rtx new_x = thumb_legitimize_reload_address (&X, MODE, OPNUM, TYPE, IND_L); \
1421 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
1423 ARM_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN); \
1425 THUMB_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
1428 needed to represent mode MODE in a register of class CLASS.
1430 #define CLASS_MAX_NREGS(CLASS, MODE) \
1431 (((CLASS) == FPA_REGS || (CLASS) == CIRRUS_REGS) ? 1 : ARM_NUM_REGS (MODE))
1441 #define REGISTER_MOVE_COST(MODE, FROM, TO) \
1515 assuming the value has mode MODE. */
1516 #define LIBCALL_VALUE(MODE) \
1517 (TARGET_AAPCS_BASED ? aapcs_libcall_value (MODE) \
1519 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
1520 ? gen_rtx_REG (MODE, FIRST_FPA_REGNUM) \
1522 && GET_MODE_CLASS (MODE) == MODE_FLOAT \
1523 ? gen_rtx_REG (MODE, FIRST_CIRRUS_FP_REGNUM) \
1524 : TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (MODE) \
1525 ? gen_rtx_REG (MODE, FIRST_IWMMXT_REGNUM) \
1526 : gen_rtx_REG (MODE, ARG_REGISTER (1)))
1695 MODE is the argument's machine mode.
1709 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1710 arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED))
1712 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1713 (arm_pad_arg_upward (MODE, TYPE) ? upward : downward)
1715 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
1716 (arm_pad_reg_upward (MODE, TYPE, FIRST) ? upward : downward)
1731 of mode MODE and data type TYPE.
1733 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1734 arm_function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
1739 #define FUNCTION_ARG_BOUNDARY(MODE,TYPE) \
1740 ((ARM_DOUBLEWORD_ALIGN && arm_needs_doubleword_align (MODE, TYPE)) \
1896 #define THUMB1_REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
1898 || (GET_MODE_SIZE (MODE) >= 4 \
1901 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
1903 ? THUMB1_REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE) \
1908 #define REGNO_MODE_OK_FOR_REG_BASE_P(X, MODE) \
2065 #define THUMB1_REG_MODE_OK_FOR_BASE_P(X, MODE) \
2068 || (GET_MODE_SIZE (MODE) >= 4 \
2083 #define THUMB1_REG_MODE_OK_FOR_BASE_P(X, MODE) \
2084 THUMB1_REGNO_MODE_OK_FOR_BASE_P (REGNO (X), MODE)
2092 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
2094 ? THUMB1_REG_MODE_OK_FOR_BASE_P (X, MODE) \
2112 #define REG_MODE_OK_FOR_REG_BASE_P(X, MODE) \
2166 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
2170 #define LOAD_EXTEND_OP(MODE) \
2172 ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND \
2173 : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : UNKNOWN)))
2178 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
2260 #define REVERSIBLE_CC_MODE(MODE) 1
2262 #define REVERSE_CONDITION(CODE,MODE) \
2263 (((MODE) == CCFPmode || (MODE) == CCFPEmode) \
2283 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
2284 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)