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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/

Lines Matching refs:ntxd

103 	uint16		ntxd;		/* # tx descriptors tunable */
197 #define TXD(x) XXD((x), di->ntxd)
457 uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset,
485 ASSERT(ISPOWEROF2(ntxd));
490 if (ntxd == 0)
499 ASSERT(ntxd <= D32MAXDD);
517 DMA_TRACE(("%s: %s: %s osh %p flags 0x%x ntxd %d nrxd %d rxbufsize %d "
520 osh, di->hnddma.dmactrlflags, ntxd, nrxd,
531 di->ntxd = (uint16)ntxd;
605 ASSERT(ntxd <= D64MAXDD);
607 ASSERT(ntxd <= D64MAXDD_LARGE);
681 if ((ntxd < D64MAXDD / 2) && (nrxd < D64MAXDD / 2)) {
704 if (ntxd) {
705 size = ntxd * sizeof(void *);
725 /* allocate transmit descriptor ring, only need ntxd descriptors but it must be aligned */
726 if (ntxd) {
756 if (ntxd) {
757 size = ntxd * sizeof(hnddma_seg_map_t);
918 MFREE(di->osh, (void *)di->txp, (di->ntxd * sizeof(void *)));
924 MFREE(di->osh, (void *)di->txp_dmah, di->ntxd * sizeof(hnddma_seg_map_t));
1460 if (di->ntxd == 0)
1493 if (di->ntxd == 0) {
1619 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
1824 if (di->ntxd == 0)
1838 dma32_dumpring(di, b, di->txd32, di->txin, di->txout, di->ntxd);
1883 if (di->ntxd == 0)
1903 dma64_dumpring(di, b, di->txd64, di->txin, di->txout, di->ntxd);
1949 if (di->ntxd == 0)
1953 di->hnddma.txavail = di->ntxd - 1;
1956 BZERO_SM(DISCARD_QUAL(di->txd32, void), (di->ntxd * sizeof(dma32dd_t)));
1988 if (di->ntxd == 0)
1999 if (di->ntxd == 0)
2008 return (di->ntxd == 0) || ((R_REG(di->osh, &di->d32txregs->control) & XC_SE) == XC_SE);
2016 if (di->ntxd == 0)
2029 if (di->ntxd == 0)
2080 size = (direction == DMA_TX) ? (di->ntxd * ddlen) : (di->nrxd * ddlen);
2089 DMA_ERROR(("%s: dma_alloc: DMA_ALLOC_CONSISTENT(ntxd) failed\n",
2133 if (di->ntxd == 0)
2199 if (di->ntxd == 0)
2270 if (map->nsegs > (uint)(di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1))
2290 if (txout == (di->ntxd - 1))
2325 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
2359 if (di->ntxd == 0)
2424 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
2501 ASSERT(rot < di->ntxd);
2504 if (rot >= (di->ntxd - nactive)) {
2521 if (new == (di->ntxd - 1))
2545 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
2560 if (di->ntxd == 0)
2564 di->hnddma.txavail = di->ntxd - 1;
2567 BZERO_SM((void *)(uintptr)di->txd64, (di->ntxd * sizeof(dma64dd_t)));
2613 if (di->ntxd == 0)
2624 if (di->ntxd == 0)
2633 return (di->ntxd == 0) ||
2642 if (di->ntxd == 0)
2655 if (di->ntxd == 0)
2709 size = (direction == DMA_TX) ? (di->ntxd * ddlen) : (di->nrxd * ddlen);
2718 DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(ntxd) failed\n",
2775 if (di->ntxd == 0)
2841 if (di->ntxd == 0)
2918 if (txout == (di->ntxd - 1))
2937 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
3014 if (map->nsegs > (uint)(di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1))
3035 if (txout == (di->ntxd - 1))
3066 if (txout == (di->ntxd - 1))
3115 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
3148 if (di->ntxd == 0)
3230 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
3327 ASSERT(rot < di->ntxd);
3330 if (rot >= (di->ntxd - nactive)) {
3347 if (new == (di->ntxd - 1))
3377 di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;