sim/frv/profile-fr400.c

254 frvbf_model_fr400_u_exec (SIM_CPU *cpu, const IDESC *idesc,
261 frvbf_model_fr400_u_integer (SIM_CPU *cpu, const IDESC *idesc,
272 frvbf_model_fr400_u_imul (SIM_CPU *cpu, const IDESC *idesc,
282 frvbf_model_fr400_u_idiv (SIM_CPU *cpu, const IDESC *idesc,
343 frvbf_model_fr400_u_branch (SIM_CPU *cpu, const IDESC *idesc,
404 frvbf_model_fr400_u_trap (SIM_CPU *cpu, const IDESC *idesc,
415 frvbf_model_fr400_u_check (SIM_CPU *cpu, const IDESC *idesc,
425 frvbf_model_fr400_u_set_hilo (SIM_CPU *cpu, const IDESC *idesc,
435 frvbf_model_fr400_u_gr_load (SIM_CPU *cpu, const IDESC *idesc,
446 frvbf_model_fr400_u_gr_store (SIM_CPU *cpu, const IDESC *idesc,
457 frvbf_model_fr400_u_fr_load (SIM_CPU *cpu, const IDESC *idesc,
485 frvbf_model_fr400_u_fr_store (SIM_CPU *cpu, const IDESC *idesc,
535 frvbf_model_fr400_u_swap (SIM_CPU *cpu, const IDESC *idesc,
545 frvbf_model_fr400_u_fr2gr (SIM_CPU *cpu, const IDESC *idesc,
583 frvbf_model_fr400_u_spr2gr (SIM_CPU *cpu, const IDESC *idesc,
593 frvbf_model_fr400_u_gr2fr (SIM_CPU *cpu, const IDESC *idesc,
614 frvbf_model_fr400_u_gr2spr (SIM_CPU *cpu, const IDESC *idesc,
624 frvbf_model_fr400_u_media_1 (SIM_CPU *cpu, const IDESC *idesc,
694 frvbf_model_fr400_u_media_1_quad (SIM_CPU *cpu, const IDESC *idesc,
789 frvbf_model_fr400_u_media_hilo (SIM_CPU *cpu, const IDESC *idesc,
827 frvbf_model_fr400_u_media_2 (SIM_CPU *cpu, const IDESC *idesc,
957 frvbf_model_fr400_u_media_2_quad (SIM_CPU *cpu, const IDESC *idesc,
1192 frvbf_model_fr400_u_media_2_acc (SIM_CPU *cpu, const IDESC *idesc,
1254 frvbf_model_fr400_u_media_2_acc_dual (SIM_CPU *cpu, const IDESC *idesc,
1358 frvbf_model_fr400_u_media_2_add_sub (SIM_CPU *cpu, const IDESC *idesc,
1440 frvbf_model_fr400_u_media_2_add_sub_dual (SIM_CPU *cpu, const IDESC *idesc,
1582 frvbf_model_fr400_u_media_3 (SIM_CPU *cpu, const IDESC *idesc,
1593 frvbf_model_fr400_u_media_3_dual (SIM_CPU *cpu, const IDESC *idesc,
1654 frvbf_model_fr400_u_media_3_quad (SIM_CPU *cpu, const IDESC *idesc,
1665 frvbf_model_fr400_u_media_4 (SIM_CPU *cpu, const IDESC *idesc,
1731 frvbf_model_fr400_u_media_4_accg (SIM_CPU *cpu, const IDESC *idesc,
1744 frvbf_model_fr400_u_media_4_acc_dual (SIM_CPU *cpu, const IDESC *idesc,
1795 frvbf_model_fr400_u_media_6 (SIM_CPU *cpu, const IDESC *idesc,
1854 frvbf_model_fr400_u_media_7 (SIM_CPU *cpu, const IDESC *idesc,
1918 frvbf_model_fr400_u_media_dual_expand (SIM_CPU *cpu, const IDESC *idesc,
1975 frvbf_model_fr400_u_media_dual_htob (SIM_CPU *cpu, const IDESC *idesc,
2040 frvbf_model_fr400_u_ici (SIM_CPU *cpu, const IDESC *idesc,
2050 frvbf_model_fr400_u_dci (SIM_CPU *cpu, const IDESC *idesc,
2060 frvbf_model_fr400_u_dcf (SIM_CPU *cpu, const IDESC *idesc,
2070 frvbf_model_fr400_u_icpl (SIM_CPU *cpu, const IDESC *idesc,
2080 frvbf_model_fr400_u_dcpl (SIM_CPU *cpu, const IDESC *idesc,
2090 frvbf_model_fr400_u_icul (SIM_CPU *cpu, const IDESC *idesc,
2100 frvbf_model_fr400_u_dcul (SIM_CPU *cpu, const IDESC *idesc,
2110 frvbf_model_fr400_u_barrier (SIM_CPU *cpu, const IDESC *idesc,
2118 frvbf_model_fr400_u_membar (SIM_CPU *cpu, const IDESC *idesc,