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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/arm/

Lines Matching refs:state

28 void ARMul_Reset (ARMul_State * state);
29 ARMword ARMul_DoCycle (ARMul_State * state);
30 unsigned ARMul_DoCoPro (ARMul_State * state);
31 ARMword ARMul_DoProg (ARMul_State * state);
32 ARMword ARMul_DoInstr (ARMul_State * state);
33 void ARMul_Abort (ARMul_State * state, ARMword address);
68 * Returns a new instantiation of the ARMulator's state *
74 ARMul_State *state;
77 state = (ARMul_State *) malloc (sizeof (ARMul_State));
78 memset (state, 0, sizeof (ARMul_State));
80 state->Emulate = RUN;
83 state->Reg[i] = 0;
85 state->RegBank[j][i] = 0;
88 state->Spsr[i] = 0;
90 /* state->Mode = USER26MODE; */
91 state->Mode = USER32MODE;
93 state->CallDebug = FALSE;
94 state->Debug = FALSE;
95 state->VectorCatch = 0;
96 state->Aborted = FALSE;
97 state->Reseted = FALSE;
98 state->Inted = 3;
99 state->LastInted = 3;
101 state->MemDataPtr = NULL;
102 state->MemInPtr = NULL;
103 state->MemOutPtr = NULL;
104 state->MemSparePtr = NULL;
105 state->MemSize = 0;
107 state->OSptr = NULL;
108 state->CommandLine = NULL;
110 state->CP14R0_CCD = -1;
111 state->LastTime = 0;
113 state->EventSet = 0;
114 state->Now = 0;
115 state->EventPtr = (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
119 *(state->EventPtr + i) = NULL;
121 state->prog32Sig = HIGH;
122 state->data32Sig = HIGH;
124 state->lateabtSig = LOW;
125 state->bigendSig = LOW;
127 state->is_v4 = LOW;
128 state->is_v5 = LOW;
129 state->is_v5e = LOW;
130 state->is_XScale = LOW;
131 state->is_iWMMXt = LOW;
132 state->is_v6 = LOW;
134 ARMul_Reset (state);
136 return state;
144 ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
148 state->prog32Sig = LOW;
149 state->data32Sig = LOW;
153 state->prog32Sig = HIGH;
154 state->data32Sig = HIGH;
157 state->lateabtSig = LOW;
159 state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
160 state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
161 state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
162 state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
163 state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW;
164 state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW;
165 state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW;
169 ARMul_CoProInit (state);
173 * Call this routine to set up the initial machine state (or perform a RESET *
177 ARMul_Reset (ARMul_State * state)
179 state->NextInstr = 0;
181 if (state->prog32Sig)
183 state->Reg[15] = 0;
184 state->Cpsr = INTBITS | SVC32MODE;
185 state->Mode = SVC32MODE;
189 state->Reg[15] = R15INTBITS | SVC26MODE;
190 state->Cpsr = INTBITS | SVC26MODE;
191 state->Mode = SVC26MODE;
194 ARMul_CPSRAltered (state);
195 state->Bank = SVCBANK;
199 state->EndCondition = 0;
200 state->ErrorCode = 0;
202 state->Exception = FALSE;
203 state->NresetSig = HIGH;
204 state->NfiqSig = HIGH;
205 state->NirqSig = HIGH;
206 state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
207 state->abortSig = LOW;
208 state->AbortAddr = 1;
210 state->NumInstrs = 0;
211 state->NumNcycles = 0;
212 state->NumScycles = 0;
213 state->NumIcycles = 0;
214 state->NumCcycles = 0;
215 state->NumFcycles = 0;
218 ARMul_OSInit (state);
230 ARMul_DoProg (ARMul_State * state)
234 state->Emulate = RUN;
235 while (state->Emulate != STOP)
237 state->Emulate = RUN;
238 if (state->prog32Sig && ARMul_MODE32BIT)
239 pc = ARMul_Emulate32 (state);
241 pc = ARMul_Emulate26 (state);
253 ARMul_DoInstr (ARMul_State * state)
257 state->Emulate = ONCE;
258 if (state->prog32Sig && ARMul_MODE32BIT)
259 pc = ARMul_Emulate32 (state);
261 pc = ARMul_Emulate26 (state);
273 ARMul_Abort (ARMul_State * state, ARMword vector)
280 state->Aborted = FALSE;
282 if (ARMul_OSException (state, vector, ARMul_GetPC (state)))
285 if (state->prog32Sig)
289 temp = state->Reg[15];
296 SETABORT (INTBITS, state->prog32Sig ? SVC32MODE : SVC26MODE, 0);
299 SETABORT (IBIT, state->prog32Sig ? UNDEF32MODE : SVC26MODE, isize);
302 SETABORT (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE, isize);
305 state->AbortAddr = 1;
306 SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, esize);
309 SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, e2size);
315 if ( ! state->is_XScale
316 || ! state->CPRead[13] (state, 0, & temp)
318 SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize);
321 if ( ! state->is_XScale
322 || ! state->CPRead[13] (state, 0, & temp)
324 SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize);
328 ARMul_SetR15 (state, vector);
330 ARMul_SetR15 (state, R15CCINTMODE | vector);
332 if (ARMul_ReadWord (state, ARMul_GetPC (state)) == 0)
339 case ARMul_ResetV: state->EndCondition = RDIError_Reset; break;
340 case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break;
341 case ARMul_SWIV: state->EndCondition = RDIError_SoftwareInterrupt; break;
342 case ARMul_PrefetchAbortV: state->EndCondition = RDIError_PrefetchAbort; break;
343 case ARMul_DataAbortV: state->EndCondition = RDIError_DataAbort; break;
344 case ARMul_AddrExceptnV: state->EndCondition = RDIError_AddressException; break;
345 case ARMul_IRQV: state->EndCondition = RDIError_IRQ; break;
346 case ARMul_FIQV: state->EndCondition = RDIError_FIQ; break;
349 state->Emulate = FALSE;