Lines Matching refs:control_register
173 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
209 u32 control_register; /* cached value */
367 i = rme9652->control_register & RME9652_latency;
440 s->control_register |= (RME9652_IE | RME9652_start_bit);
441 rme9652_write(s, RME9652_control_register, s->control_register);
446 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
447 rme9652_write(s, RME9652_control_register, s->control_register);
469 s->control_register &= ~RME9652_latency;
470 s->control_register |= rme9652_encode_latency(n);
472 rme9652_write(s, RME9652_control_register, s->control_register);
546 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
547 rme9652->control_register |= rate;
548 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
620 rme9652->control_register =
628 rme9652->control_register);
642 rme9652->control_register |= mask;
644 rme9652->control_register &= ~mask;
646 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
713 rme9652->control_register |= RME9652_SPDIF_RESET;
864 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
865 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
891 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
901 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
903 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
911 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
967 return rme9652_decode_spdif_in(rme9652->control_register &
975 rme9652->control_register &= ~RME9652_inp;
976 rme9652->control_register |= rme9652_encode_spdif_in(in);
982 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1038 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1046 rme9652->control_register |= RME9652_opt_out;
1048 rme9652->control_register &= ~RME9652_opt_out;
1055 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1099 if (rme9652->control_register & RME9652_wsel) {
1101 } else if (rme9652->control_register & RME9652_Master) {
1114 rme9652->control_register &=
1118 rme9652->control_register =
1119 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1122 rme9652->control_register |=
1131 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1184 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1202 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1205 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1208 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1211 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1214 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1222 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1600 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1604 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1614 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1617 } else if (rme9652->control_register & RME9652_wsel) {
1628 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1648 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1653 switch (rme9652_decode_spdif_in(rme9652->control_register &
1669 if (rme9652->control_register & RME9652_opt_out) {
1675 if (rme9652->control_register & RME9652_PRO) {
1681 if (rme9652->control_register & RME9652_EMP) {
1687 if (rme9652->control_register & RME9652_Dolby) {
1835 rme9652->control_register =
1838 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1995 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1996 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);