Lines Matching refs:FLD_MOD
107 dsi_write_reg(idx, FLD_MOD(dsi_read_reg(idx), val, start, end))
1023 l = FLD_MOD(l, 1, 0, 0); /* DSI_PLL_STOPMODE */
1024 l = FLD_MOD(l, cinfo->regn - 1, 7, 1); /* DSI_PLL_REGN */
1025 l = FLD_MOD(l, cinfo->regm, 18, 8); /* DSI_PLL_REGM */
1026 l = FLD_MOD(l, cinfo->regm3 > 0 ? cinfo->regm3 - 1 : 0,
1028 l = FLD_MOD(l, cinfo->regm4 > 0 ? cinfo->regm4 - 1 : 0,
1045 l = FLD_MOD(l, f, 4, 1); /* DSI_PLL_FREQSEL */
1046 l = FLD_MOD(l, cinfo->use_dss2_fck ? 0 : 1,
1048 l = FLD_MOD(l, cinfo->highfreq,
1050 l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */
1051 l = FLD_MOD(l, 0, 14, 14); /* DSIPHY_CLKINEN */
1052 l = FLD_MOD(l, 1, 20, 20); /* DSI_HSDIVBYPASS */
1072 l = FLD_MOD(l, 0, 0, 0); /* DSI_PLL_IDLE */
1073 l = FLD_MOD(l, 0, 5, 5); /* DSI_PLL_PLLLPMODE */
1074 l = FLD_MOD(l, 0, 6, 6); /* DSI_PLL_LOWCURRSTBY */
1075 l = FLD_MOD(l, 0, 7, 7); /* DSI_PLL_TIGHTPHASELOCK */
1076 l = FLD_MOD(l, 0, 8, 8); /* DSI_PLL_DRIFTGUARDEN */
1077 l = FLD_MOD(l, 0, 10, 9); /* DSI_PLL_LOCKSEL */
1078 l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */
1079 l = FLD_MOD(l, 1, 14, 14); /* DSIPHY_CLKINEN */
1080 l = FLD_MOD(l, 0, 15, 15); /* DSI_BYPASSEN */
1081 l = FLD_MOD(l, 1, 16, 16); /* DSS_CLOCK_EN */
1082 l = FLD_MOD(l, 0, 17, 17); /* DSS_CLOCK_PWDN */
1083 l = FLD_MOD(l, 1, 18, 18); /* DSI_PROTO_CLOCK_EN */
1084 l = FLD_MOD(l, 0, 19, 19); /* DSI_PROTO_CLOCK_PWDN */
1085 l = FLD_MOD(l, 0, 20, 20); /* DSI_HSDIVBYPASS */
1417 r = FLD_MOD(r, clk_lane, 2, 0);
1418 r = FLD_MOD(r, clk_pol, 3, 3);
1419 r = FLD_MOD(r, data1_lane, 6, 4);
1420 r = FLD_MOD(r, data1_pol, 7, 7);
1421 r = FLD_MOD(r, data2_lane, 10, 8);
1422 r = FLD_MOD(r, data2_pol, 11, 11);
1510 r = FLD_MOD(r, ths_prepare, 31, 24);
1511 r = FLD_MOD(r, ths_prepare_ths_zero, 23, 16);
1512 r = FLD_MOD(r, ths_trail, 15, 8);
1513 r = FLD_MOD(r, ths_exit, 7, 0);
1517 r = FLD_MOD(r, tlpx_half, 22, 16);
1518 r = FLD_MOD(r, tclk_trail, 15, 8);
1519 r = FLD_MOD(r, tclk_zero, 7, 0);
1523 r = FLD_MOD(r, tclk_prepare, 7, 0);
1698 r = FLD_MOD(r, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */
1738 r = FLD_MOD(r, 0, 1, 1); /* SOURCE, 0 = L4 */
1739 r = FLD_MOD(r, 0, 2, 2); /* BTA_SHORT_EN */
1740 r = FLD_MOD(r, 0, 3, 3); /* BTA_LONG_EN */
1741 r = FLD_MOD(r, 0, 4, 4); /* MODE, 0 = command */
1742 r = FLD_MOD(r, 1, 7, 7); /* CS_TX_EN */
1743 r = FLD_MOD(r, 1, 8, 8); /* ECC_TX_EN */
1744 r = FLD_MOD(r, 0, 9, 9); /* MODE_SPEED, high speed on/off */
1746 r = FLD_MOD(r, 4, 29, 27); /* DMA_RX_REQ_NB = no dma */
1747 r = FLD_MOD(r, 4, 23, 21); /* DMA_TX_REQ_NB = no dma */
2303 r = FLD_MOD(r, 1, 15, 15); /* LP_RX_TO */
2304 r = FLD_MOD(r, x16 ? 1 : 0, 14, 14); /* LP_RX_TO_X16 */
2305 r = FLD_MOD(r, x4 ? 1 : 0, 13, 13); /* LP_RX_TO_X4 */
2306 r = FLD_MOD(r, ticks, 12, 0); /* LP_RX_COUNTER */
2329 r = FLD_MOD(r, 1, 31, 31); /* TA_TO */
2330 r = FLD_MOD(r, x16 ? 1 : 0, 30, 30); /* TA_TO_X16 */
2331 r = FLD_MOD(r, x8 ? 1 : 0, 29, 29); /* TA_TO_X8 */
2332 r = FLD_MOD(r, ticks, 28, 16); /* TA_TO_COUNTER */
2355 r = FLD_MOD(r, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */
2356 r = FLD_MOD(r, x16 ? 1 : 0, 14, 14); /* STOP_STATE_X16_IO */
2357 r = FLD_MOD(r, x4 ? 1 : 0, 13, 13); /* STOP_STATE_X4_IO */
2358 r = FLD_MOD(r, ticks, 12, 0); /* STOP_STATE_COUNTER_IO */
2381 r = FLD_MOD(r, 1, 31, 31); /* HS_TX_TO */
2382 r = FLD_MOD(r, x16 ? 1 : 0, 30, 30); /* HS_TX_TO_X16 */
2383 r = FLD_MOD(r, x4 ? 1 : 0, 29, 29); /* HS_TX_TO_X8 (4 really) */
2384 r = FLD_MOD(r, ticks, 28, 16); /* HS_TX_TO_COUNTER */
2429 r = FLD_MOD(r, 1, 1, 1); /* CS_RX_EN */
2430 r = FLD_MOD(r, 1, 2, 2); /* ECC_RX_EN */
2431 r = FLD_MOD(r, 1, 3, 3); /* TX_FIFO_ARBITRATION */
2432 r = FLD_MOD(r, 1, 4, 4); /* VP_CLK_RATIO, always 1, see errata*/
2433 r = FLD_MOD(r, buswidth, 7, 6); /* VP_DATA_BUS_WIDTH */
2434 r = FLD_MOD(r, 0, 8, 8); /* VP_CLK_POL */
2435 r = FLD_MOD(r, 2, 13, 12); /* LINE_BUFFER, 2 lines */
2436 r = FLD_MOD(r, 1, 14, 14); /* TRIGGER_RESET_MODE */
2437 r = FLD_MOD(r, 1, 19, 19); /* EOT_ENABLE */
2438 r = FLD_MOD(r, 1, 24, 24); /* DCS_CMD_ENABLE */
2439 r = FLD_MOD(r, 0, 25, 25); /* DCS_CMD_CODE, 1=start, 0=continue */
2497 r = FLD_MOD(r, ddr_clk_pre, 15, 8);
2498 r = FLD_MOD(r, ddr_clk_post, 7, 0);
2691 l = FLD_MOD(l, 1, 30, 30); /* TE_EN */
2693 l = FLD_MOD(l, 1, 31, 31); /* TE_START */