Lines Matching defs:ohci
13 * Modified for LH7A404 from ohci-sa1111.c
16 * Modified for pxa27x from ohci-lh7a404.c
26 #include <mach/ohci.h>
102 struct ohci_hcd ohci;
121 static int pxa27x_ohci_select_pmm(struct pxa27x_ohci *ohci, int mode)
123 uint32_t uhcrhda = __raw_readl(ohci->mmio_base + UHCRHDA);
124 uint32_t uhcrhdb = __raw_readl(ohci->mmio_base + UHCRHDB);
148 __raw_writel(uhcrhda, ohci->mmio_base + UHCRHDA);
149 __raw_writel(uhcrhdb, ohci->mmio_base + UHCRHDB);
157 static inline void pxa27x_setup_hc(struct pxa27x_ohci *ohci,
160 uint32_t uhchr = __raw_readl(ohci->mmio_base + UHCHR);
161 uint32_t uhcrhda = __raw_readl(ohci->mmio_base + UHCRHDA);
193 __raw_writel(uhchr, ohci->mmio_base + UHCHR);
194 __raw_writel(uhcrhda, ohci->mmio_base + UHCRHDA);
197 static inline void pxa27x_reset_hc(struct pxa27x_ohci *ohci)
199 uint32_t uhchr = __raw_readl(ohci->mmio_base + UHCHR);
201 __raw_writel(uhchr | UHCHR_FHR, ohci->mmio_base + UHCHR);
203 __raw_writel(uhchr & ~UHCHR_FHR, ohci->mmio_base + UHCHR);
212 static int pxa27x_start_hc(struct pxa27x_ohci *ohci, struct device *dev)
220 clk_enable(ohci->clk);
222 pxa27x_reset_hc(ohci);
224 uhchr = __raw_readl(ohci->mmio_base + UHCHR) | UHCHR_FSBIR;
225 __raw_writel(uhchr, ohci->mmio_base + UHCHR);
227 while (__raw_readl(ohci->mmio_base + UHCHR) & UHCHR_FSBIR)
230 pxa27x_setup_hc(ohci, inf);
238 uhchr = __raw_readl(ohci->mmio_base + UHCHR) & ~UHCHR_SSE;
239 __raw_writel(uhchr, ohci->mmio_base + UHCHR);
240 __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, ohci->mmio_base + UHCHIE);
247 static void pxa27x_stop_hc(struct pxa27x_ohci *ohci, struct device *dev)
257 pxa27x_reset_hc(ohci);
260 uhccoms = __raw_readl(ohci->mmio_base + UHCCOMS) | 0x01;
261 __raw_writel(uhccoms, ohci->mmio_base + UHCCOMS);
264 clk_disable(ohci->clk);
288 struct pxa27x_ohci *ohci;
335 ohci = (struct pxa27x_ohci *)hcd_to_ohci(hcd);
336 ohci->dev = &pdev->dev;
337 ohci->clk = usb_clk;
338 ohci->mmio_base = (void __iomem *)hcd->regs;
340 if ((retval = pxa27x_start_hc(ohci, &pdev->dev)) < 0) {
346 pxa27x_ohci_select_pmm(ohci, inf->port_mode);
357 pxa27x_stop_hc(ohci, &pdev->dev);
384 struct pxa27x_ohci *ohci = to_pxa27x_ohci(hcd);
387 pxa27x_stop_hc(ohci, &pdev->dev);
391 clk_put(ohci->clk);
399 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
402 ohci_dbg (ohci, "ohci_pxa27x_start, ohci:%p", ohci);
405 ohci->num_ports = 3;
407 if ((ret = ohci_init(ohci)) < 0)
410 if ((ret = ohci_run (ohci)) < 0) {
488 struct pxa27x_ohci *ohci = to_pxa27x_ohci(hcd);
490 if (time_before(jiffies, ohci->ohci.next_statechange))
492 ohci->ohci.next_statechange = jiffies;
494 pxa27x_stop_hc(ohci, dev);
503 struct pxa27x_ohci *ohci = to_pxa27x_ohci(hcd);
507 if (time_before(jiffies, ohci->ohci.next_statechange))
509 ohci->ohci.next_statechange = jiffies;
511 if ((status = pxa27x_start_hc(ohci, dev)) < 0)
515 pxa27x_ohci_select_pmm(ohci, inf->port_mode);
528 MODULE_ALIAS("platform:pxa27x-ohci");
535 .name = "pxa27x-ohci",