Lines Matching defs:pHwData
18 unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
20 struct wb35_reg *reg = &pHwData->reg;
28 if (pHwData->SurpriseRemove)
64 Wb35Reg_EP0VM_start(pHwData);
77 void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
79 struct wb35_reg *reg = &pHwData->reg;
123 unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
125 struct wb35_reg *reg = &pHwData->reg;
129 if (pHwData->SurpriseRemove)
143 ret = usb_control_msg(pHwData->WbUsb.udev,
144 usb_sndctrlpipe(pHwData->WbUsb.udev, 0),
150 Wb35Reg_EP0VM_start(pHwData);
156 pHwData->SurpriseRemove = 1;
166 unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
168 struct wb35_reg *reg = &pHwData->reg;
175 if (pHwData->SurpriseRemove)
209 Wb35Reg_EP0VM_start(pHwData);
226 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
232 struct wb35_reg *reg = &pHwData->reg;
239 if (pHwData->SurpriseRemove)
274 Wb35Reg_EP0VM_start(pHwData);
290 unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
292 struct wb35_reg *reg = &pHwData->reg;
297 if (pHwData->SurpriseRemove)
308 ret = usb_control_msg(pHwData->WbUsb.udev,
309 usb_rcvctrlpipe(pHwData->WbUsb.udev, 0),
317 Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
320 Wb35Reg_EP0VM_start(pHwData);
326 pHwData->SurpriseRemove = 1;
338 unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
340 struct wb35_reg *reg = &pHwData->reg;
347 if (pHwData->SurpriseRemove)
379 Wb35Reg_EP0VM_start(pHwData);
391 void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
393 struct wb35_reg *reg = &pHwData->reg;
397 Wb35Reg_EP0VM(pHwData);
402 void Wb35Reg_EP0VM(struct hw_data *pHwData)
404 struct wb35_reg *reg = &pHwData->reg;
415 if (pHwData->SurpriseRemove)
435 usb_fill_control_urb(urb, pHwData->WbUsb.udev,
436 REG_DIRECTION(pHwData->WbUsb.udev, reg_queue),
438 Wb35Reg_EP0VM_complete, (void *)pHwData);
460 struct hw_data *pHwData = (struct hw_data *)urb->context;
461 struct wb35_reg *reg = &pHwData->reg;
469 if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
486 pHwData->SurpriseRemove = 1;
491 Wb35Reg_EP0VM(pHwData);
501 void Wb35Reg_destroy(struct hw_data *pHwData)
503 struct wb35_reg *reg = &pHwData->reg;
507 Uxx_power_off_procedure(pHwData);
545 unsigned char Wb35Reg_initial(struct hw_data *pHwData)
547 struct wb35_reg *reg = &pHwData->reg;
555 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
556 Wb35Reg_ReadSync(pHwData, 0x03b4, <mp);
577 pHwData->phy_type = reg->EEPROMPhyType;
581 Uxx_power_on_procedure(pHwData);
584 Uxx_ReadEthernetAddress(pHwData);
587 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
588 Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
591 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
592 Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
595 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
596 Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
599 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
600 Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
603 memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
606 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
608 pHwData->PowerIndexFromEEPROM = (u8)TxVga;
609 pHwData->VCO_trim = (u8)VCO_trim & 0xff;
610 if (pHwData->VCO_trim == 0xff)
611 pHwData->VCO_trim = 0x28;
618 GetTxVgaFromEEPROM(pHwData);
621 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
622 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
623 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
626 RFSynthesizer_initial(pHwData);
628 BBProcessor_initial(pHwData); /* Async write, must wait until complete */
630 Wb35Reg_phy_calibration(pHwData);
632 Mxx_initial(pHwData);
633 Dxx_initial(pHwData);
635 if (pHwData->SurpriseRemove)
718 void Wb35Reg_phy_calibration(struct hw_data *pHwData)
722 if ((pHwData->phy_type == RF_WB_242) ||
723 (pHwData->phy_type == RF_WB_242_1)) {
724 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
725 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
726 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
728 pHwData->BB3c_cal = BB3c;
729 pHwData->BB54_cal = BB54;
731 RFSynthesizer_initial(pHwData);
732 BBProcessor_initial(pHwData); /* Async operation */
734 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
735 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);