Lines Matching refs:DMA_ENABLE
1146 iowrite32(1, FlashReg + DMA_ENABLE);
1147 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1192 iowrite32(0, FlashReg + DMA_ENABLE);
1193 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1230 iowrite32(1, FlashReg + DMA_ENABLE);
1231 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1292 iowrite32(0, FlashReg + DMA_ENABLE);
1294 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1358 iowrite32(1, FlashReg + DMA_ENABLE);
1359 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1388 iowrite32(0, FlashReg + DMA_ENABLE);
1389 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1528 iowrite32(1, FlashReg + DMA_ENABLE);
1529 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1586 iowrite32(0, FlashReg + DMA_ENABLE);
1588 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1629 iowrite32(1, FlashReg + DMA_ENABLE);
1630 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1661 iowrite32(0, FlashReg + DMA_ENABLE);
1663 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1730 iowrite32(1, FlashReg + DMA_ENABLE);
1731 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
1761 iowrite32(0, FlashReg + DMA_ENABLE);
1762 while (ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG)
2081 iowrite32(1, FlashReg + DMA_ENABLE);
2082 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2113 iowrite32(0, FlashReg + DMA_ENABLE);
2114 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2153 iowrite32(1, FlashReg + DMA_ENABLE);
2154 while (!(ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))
2192 iowrite32(0, FlashReg + DMA_ENABLE);
2194 while ((ioread32(FlashReg + DMA_ENABLE) & DMA_ENABLE__FLAG))