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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192u/

Lines Matching defs:eRFPath

63 u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
71 if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
73 else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
122 static u32 phy_FwRFSerialRead( struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset );
124 static void phy_FwRFSerialWrite( struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data);
129 * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
135 u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset)
140 BB_REGISTER_DEFINITION_T* pPhyReg = &priv->PHYRegDef[eRFPath];
150 priv->RfReg0Value[eRFPath] |= 0x140;
152 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
158 priv->RfReg0Value[eRFPath] |= 0x100;
159 priv->RfReg0Value[eRFPath] &= (~0x40);
161 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
190 priv->RfReg0Value[eRFPath] &= 0xebf;
196 (priv->RfReg0Value[eRFPath] << 16));
206 * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
223 void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data)
227 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
237 priv->RfReg0Value[eRFPath] |= 0x140;
238 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
243 priv->RfReg0Value[eRFPath] |= 0x100;
244 priv->RfReg0Value[eRFPath] &= (~0x40);
245 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
265 priv->RfReg0Value[eRFPath] = Data;
272 priv->RfReg0Value[eRFPath] &= 0xebf;
277 (priv->RfReg0Value[eRFPath] << 16));
288 * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
296 void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
302 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
309 Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
313 phy_FwRFSerialWrite(dev, eRFPath, RegAddr, New_Value);
315 phy_FwRFSerialWrite(dev, eRFPath, RegAddr, Data);
324 Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
328 rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, New_Value);
330 rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
344 u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)
350 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
354 Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
362 Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
378 RF90_RADIO_PATH_E eRFPath,
393 Data |= ((eRFPath&0x3)<<20);
440 RF90_RADIO_PATH_E eRFPath,
446 //DbgPrint("N FW RF CTRL RF-%d OF%02x DATA=%03x\n\r", eRFPath, Offset, Data);
456 Data |= ((eRFPath&0x3)<<20);
690 * RF90_RADIO_PATH_E eRFPath //only used when checkblock is HW90_BLOCK_RF
695 u8 rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath)
698 // BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
729 rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMask12Bits, WriteData[i]);
732 dwRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMask12Bits);
953 u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath)
960 switch(eRFPath){
968 rtl8192_phy_SetRFReg(dev, eRFPath, rtl819XRadioA_Array[i], bMask12Bits, rtl819XRadioA_Array[i+1]);
980 rtl8192_phy_SetRFReg(dev, eRFPath, rtl819XRadioB_Array[i], bMask12Bits, rtl819XRadioB_Array[i+1]);
992 rtl8192_phy_SetRFReg(dev, eRFPath, rtl819XRadioC_Array[i], bMask12Bits, rtl819XRadioC_Array[i+1]);
1004 rtl8192_phy_SetRFReg(dev, eRFPath, rtl819XRadioD_Array[i], bMask12Bits, rtl819XRadioD_Array[i+1]);
1064 // u8 eRFPath;
1252 //RF90_RADIO_PATH_E eRFPath;
1253 u8 eRFPath;
1268 //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
1269 // for(eRFPath = 0; eRFPath <RF90_PATH_MAX; eRFPath++)
1271 // if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
1370 for(eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++)
1372 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bZebra1_ChannelNum, CurrentCmd->Para2);
1450 u8 eRFPath;
1451 for(eRFPath = 0; eRFPath < 2; eRFPath++){
1452 printk("====>set channel:%x\n",rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x7, bZebra1_ChannelNum));