Lines Matching refs:up
93 static __inline__ void sunsab_tec_wait(struct uart_sunsab_port *up)
95 int timeout = up->tec_timeout;
97 while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout)
101 static __inline__ void sunsab_cec_wait(struct uart_sunsab_port *up)
103 int timeout = up->cec_timeout;
105 while ((readb(&up->regs->r.star) & SAB82532_STAR_CEC) && --timeout)
110 receive_chars(struct uart_sunsab_port *up,
120 if (up->port.state != NULL) /* Unopened serial console */
121 tty = up->port.state->port.tty;
130 count = readb(&up->regs->r.rbcl) & (SAB82532_RECV_FIFO_SIZE - 1);
136 sunsab_cec_wait(up);
137 writeb(SAB82532_CMDR_RFRD, &up->regs->w.cmdr);
146 buf[i] = readb(&up->regs->r.rfifo[i]);
150 sunsab_cec_wait(up);
151 writeb(SAB82532_CMDR_RMC, &up->regs->w.cmdr);
156 (up->port.line == up->port.cons->index))
163 uart_handle_sysrq_char(&up->port, ch);
168 up->port.icount.rx++;
180 up->port.icount.brk++;
187 if (uart_handle_break(&up->port))
190 up->port.icount.parity++;
192 up->port.icount.frame++;
194 up->port.icount.overrun++;
199 stat->sreg.isr0 &= (up->port.read_status_mask & 0xff);
200 stat->sreg.isr1 &= ((up->port.read_status_mask >> 8) & 0xff);
210 if (uart_handle_sysrq_char(&up->port, ch))
213 if ((stat->sreg.isr0 & (up->port.ignore_status_mask & 0xff)) == 0 &&
214 (stat->sreg.isr1 & ((up->port.ignore_status_mask >> 8) & 0xff)) == 0)
229 static void transmit_chars(struct uart_sunsab_port *up,
232 struct circ_buf *xmit = &up->port.state->xmit;
236 up->interrupt_mask1 |= SAB82532_IMR1_ALLS;
237 writeb(up->interrupt_mask1, &up->regs->w.imr1);
238 set_bit(SAB82532_ALLS, &up->irqflags);
242 if (!(readb(&up->regs->r.star) & SAB82532_STAR_XFW))
245 set_bit(SAB82532_XPR, &up->irqflags);
246 sunsab_tx_idle(up);
248 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
249 up->interrupt_mask1 |= SAB82532_IMR1_XPR;
250 writeb(up->interrupt_mask1, &up->regs->w.imr1);
254 up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR);
255 writeb(up->interrupt_mask1, &up->regs->w.imr1);
256 clear_bit(SAB82532_ALLS, &up->irqflags);
259 clear_bit(SAB82532_XPR, &up->irqflags);
260 for (i = 0; i < up->port.fifosize; i++) {
262 &up->regs->w.xfifo[i]);
264 up->port.icount.tx++;
270 sunsab_cec_wait(up);
271 writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr);
274 uart_write_wakeup(&up->port);
277 sunsab_stop_tx(&up->port);
280 static void check_status(struct uart_sunsab_port *up,
284 uart_handle_dcd_change(&up->port,
285 !(readb(&up->regs->r.vstr) & SAB82532_VSTR_CD));
288 uart_handle_cts_change(&up->port,
289 (readb(&up->regs->r.star) & SAB82532_STAR_CTS));
291 if ((readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ^ up->dsr) {
292 up->dsr = (readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ? 0 : 1;
293 up->port.icount.dsr++;
296 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
301 struct uart_sunsab_port *up = dev_id;
307 spin_lock_irqsave(&up->port.lock, flags);
310 gis = readb(&up->regs->r.gis) >> up->gis_shift;
312 status.sreg.isr0 = readb(&up->regs->r.isr0);
314 status.sreg.isr1 = readb(&up->regs->r.isr1);
321 tty = receive_chars(up, &status);
324 check_status(up, &status);
326 transmit_chars(up, &status);
329 spin_unlock_irqrestore(&up->port.lock, flags);
340 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
344 if (test_bit(SAB82532_ALLS, &up->irqflags))
355 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
358 up->cached_mode &= ~SAB82532_MODE_FRTS;
359 up->cached_mode |= SAB82532_MODE_RTS;
361 up->cached_mode |= (SAB82532_MODE_FRTS |
365 up->cached_pvr &= ~(up->pvr_dtr_bit);
367 up->cached_pvr |= up->pvr_dtr_bit;
370 set_bit(SAB82532_REGS_PENDING, &up->irqflags);
371 if (test_bit(SAB82532_XPR, &up->irqflags))
372 sunsab_tx_idle(up);
378 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
384 val = readb(&up->regs->r.pvr);
385 result |= (val & up->pvr_dsr_bit) ? 0 : TIOCM_DSR;
387 val = readb(&up->regs->r.vstr);
390 val = readb(&up->regs->r.star);
399 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
401 up->interrupt_mask1 |= SAB82532_IMR1_XPR;
402 writeb(up->interrupt_mask1, &up->regs->w.imr1);
406 static void sunsab_tx_idle(struct uart_sunsab_port *up)
408 if (test_bit(SAB82532_REGS_PENDING, &up->irqflags)) {
411 clear_bit(SAB82532_REGS_PENDING, &up->irqflags);
412 writeb(up->cached_mode, &up->regs->rw.mode);
413 writeb(up->cached_pvr, &up->regs->rw.pvr);
414 writeb(up->cached_dafo, &up->regs->w.dafo);
416 writeb(up->cached_ebrg & 0xff, &up->regs->w.bgr);
417 tmp = readb(&up->regs->rw.ccr2);
419 tmp |= (up->cached_ebrg >> 2) & 0xc0;
420 writeb(tmp, &up->regs->rw.ccr2);
427 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
428 struct circ_buf *xmit = &up->port.state->xmit;
431 up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR);
432 writeb(up->interrupt_mask1, &up->regs->w.imr1);
434 if (!test_bit(SAB82532_XPR, &up->irqflags))
437 clear_bit(SAB82532_ALLS, &up->irqflags);
438 clear_bit(SAB82532_XPR, &up->irqflags);
440 for (i = 0; i < up->port.fifosize; i++) {
442 &up->regs->w.xfifo[i]);
444 up->port.icount.tx++;
450 sunsab_cec_wait(up);
451 writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr);
457 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
460 spin_lock_irqsave(&up->port.lock, flags);
462 sunsab_tec_wait(up);
463 writeb(ch, &up->regs->w.tic);
465 spin_unlock_irqrestore(&up->port.lock, flags);
471 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
473 up->interrupt_mask0 |= SAB82532_IMR0_TCD;
474 writeb(up->interrupt_mask1, &up->regs->w.imr0);
486 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
490 spin_lock_irqsave(&up->port.lock, flags);
492 val = up->cached_dafo;
497 up->cached_dafo = val;
499 set_bit(SAB82532_REGS_PENDING, &up->irqflags);
500 if (test_bit(SAB82532_XPR, &up->irqflags))
501 sunsab_tx_idle(up);
503 spin_unlock_irqrestore(&up->port.lock, flags);
509 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
512 int err = request_irq(up->port.irq, sunsab_interrupt,
513 IRQF_SHARED, "sab", up);
517 spin_lock_irqsave(&up->port.lock, flags);
522 sunsab_cec_wait(up);
523 sunsab_tec_wait(up);
528 writeb(SAB82532_CMDR_RRES, &up->regs->w.cmdr);
529 sunsab_cec_wait(up);
530 writeb(SAB82532_CMDR_XRES, &up->regs->w.cmdr);
535 (void) readb(&up->regs->r.isr0);
536 (void) readb(&up->regs->r.isr1);
541 writeb(0, &up->regs->w.ccr0); /* power-down */
543 SAB82532_CCR0_SM_ASYNC, &up->regs->w.ccr0);
544 writeb(SAB82532_CCR1_ODS | SAB82532_CCR1_BCR | 7, &up->regs->w.ccr1);
546 SAB82532_CCR2_TOE, &up->regs->w.ccr2);
547 writeb(0, &up->regs->w.ccr3);
548 writeb(SAB82532_CCR4_MCK4 | SAB82532_CCR4_EBRG, &up->regs->w.ccr4);
549 up->cached_mode = (SAB82532_MODE_RTS | SAB82532_MODE_FCTS |
551 writeb(up->cached_mode, &up->regs->w.mode);
552 writeb(SAB82532_RFC_DPS|SAB82532_RFC_RFTH_32, &up->regs->w.rfc);
554 tmp = readb(&up->regs->rw.ccr0);
555 tmp |= SAB82532_CCR0_PU; /* power-up */
556 writeb(tmp, &up->regs->rw.ccr0);
561 up->interrupt_mask0 = (SAB82532_IMR0_PERR | SAB82532_IMR0_FERR |
563 writeb(up->interrupt_mask0, &up->regs->w.imr0);
564 up->interrupt_mask1 = (SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS |
568 writeb(up->interrupt_mask1, &up->regs->w.imr1);
569 set_bit(SAB82532_ALLS, &up->irqflags);
570 set_bit(SAB82532_XPR, &up->irqflags);
572 spin_unlock_irqrestore(&up->port.lock, flags);
580 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
583 spin_lock_irqsave(&up->port.lock, flags);
586 up->interrupt_mask0 = 0xff;
587 writeb(up->interrupt_mask0, &up->regs->w.imr0);
588 up->interrupt_mask1 = 0xff;
589 writeb(up->interrupt_mask1, &up->regs->w.imr1);
592 up->cached_dafo = readb(&up->regs->rw.dafo);
593 up->cached_dafo &= ~SAB82532_DAFO_XBRK;
594 writeb(up->cached_dafo, &up->regs->rw.dafo);
597 up->cached_mode &= ~SAB82532_MODE_RAC;
598 writeb(up->cached_mode, &up->regs->rw.mode);
601 spin_unlock_irqrestore(&up->port.lock, flags);
602 free_irq(up->port.irq, up);
648 static void sunsab_convert_to_sab(struct uart_sunsab_port *up, unsigned int cflag,
680 up->cached_dafo = dafo;
684 up->cached_ebrg = n | (m << 6);
686 up->tec_timeout = (10 * 1000000) / baud;
687 up->cec_timeout = up->tec_timeout >> 2;
698 up->port.read_status_mask = (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME |
701 up->port.read_status_mask |= (SAB82532_ISR1_CSC |
705 up->port.read_status_mask |= (SAB82532_ISR0_PERR |
708 up->port.read_status_mask |= (SAB82532_ISR1_BRK << 8);
713 up->port.ignore_status_mask = 0;
715 up->port.ignore_status_mask |= (SAB82532_ISR0_PERR |
718 up->port.ignore_status_mask |= (SAB82532_ISR1_BRK << 8);
724 up->port.ignore_status_mask |= SAB82532_ISR0_RFO;
731 up->port.ignore_status_mask |= (SAB82532_ISR0_RPF |
734 uart_update_timeout(&up->port, cflag,
735 (up->port.uartclk / (16 * quot)));
740 up->cached_mode |= SAB82532_MODE_RAC;
741 set_bit(SAB82532_REGS_PENDING, &up->irqflags);
742 if (test_bit(SAB82532_XPR, &up->irqflags))
743 sunsab_tx_idle(up);
750 struct uart_sunsab_port *up = (struct uart_sunsab_port *) port;
755 spin_lock_irqsave(&up->port.lock, flags);
756 sunsab_convert_to_sab(up, termios->c_cflag, termios->c_iflag, baud, quot);
757 spin_unlock_irqrestore(&up->port.lock, flags);
762 struct uart_sunsab_port *up = (void *)port;
765 sprintf(buf, "SAB82532 %s", sab82532_version[up->type]);
820 struct uart_sunsab_port *up = (struct uart_sunsab_port *)port;
822 sunsab_tec_wait(up);
823 writeb(c, &up->regs->w.tic);
828 struct uart_sunsab_port *up = &sunsab_ports[con->index];
833 if (up->port.sysrq) {
836 locked = spin_trylock(&up->port.lock);
838 spin_lock(&up->port.lock);
840 uart_console_write(&up->port, s, n, sunsab_console_putchar);
841 sunsab_tec_wait(up);
844 spin_unlock(&up->port.lock);
850 struct uart_sunsab_port *up = &sunsab_ports[con->index];
860 if (up->port.type != PORT_SUNSAB)
866 sunserial_console_termios(con, up->port.dev->of_node);
887 spin_lock_init(&up->port.lock);
892 sunsab_startup(&up->port);
894 spin_lock_irqsave(&up->port.lock, flags);
899 up->interrupt_mask0 = SAB82532_IMR0_PERR | SAB82532_IMR0_FERR |
901 writeb(up->interrupt_mask0, &up->regs->w.imr0);
902 up->interrupt_mask1 = SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS |
906 writeb(up->interrupt_mask1, &up->regs->w.imr1);
908 quot = uart_get_divisor(&up->port, baud);
909 sunsab_convert_to_sab(up, con->cflag, 0, baud, quot);
910 sunsab_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS);
912 spin_unlock_irqrestore(&up->port.lock, flags);
936 static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
941 up->port.line = line;
942 up->port.dev = &op->dev;
944 up->port.mapbase = op->resource[0].start + offset;
945 up->port.membase = of_ioremap(&op->resource[0], offset,
948 if (!up->port.membase)
950 up->regs = (union sab82532_async_regs __iomem *) up->port.membase;
952 up->port.irq = op->archdata.irqs[0];
954 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
955 up->port.iotype = UPIO_MEM;
957 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
959 up->port.ops = &sunsab_pops;
960 up->port.type = PORT_SUNSAB;
961 up->port.uartclk = SAB_BASE_BAUD;
963 up->type = readb(&up->regs->r.vstr) & 0x0f;
964 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
965 writeb(0xff, &up->regs->w.pim);
966 if ((up->port.line & 0x1) == 0) {
967 up->pvr_dsr_bit = (1 << 0);
968 up->pvr_dtr_bit = (1 << 1);
969 up->gis_shift = 2;
971 up->pvr_dsr_bit = (1 << 3);
972 up->pvr_dtr_bit = (1 << 2);
973 up->gis_shift = 0;
975 up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
976 writeb(up->cached_pvr, &up->regs->w.pvr);
977 up->cached_mode = readb(&up->regs->rw.mode);
978 up->cached_mode |= SAB82532_MODE_FRTS;
979 writeb(up->cached_mode, &up->regs->rw.mode);
980 up->cached_mode |= SAB82532_MODE_RTS;
981 writeb(up->cached_mode, &up->regs->rw.mode);
983 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
984 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
992 struct uart_sunsab_port *up;
995 up = &sunsab_ports[inst * 2];
997 err = sunsab_init_one(&up[0], op,
1003 err = sunsab_init_one(&up[1], op,
1010 &sunsab_reg, up[0].port.line,
1014 &sunsab_reg, up[1].port.line,
1017 err = uart_add_one_port(&sunsab_reg, &up[0].port);
1021 err = uart_add_one_port(&sunsab_reg, &up[1].port);
1025 dev_set_drvdata(&op->dev, &up[0]);
1032 uart_remove_one_port(&sunsab_reg, &up[0].port);
1035 up[1].port.membase,
1039 up[0].port.membase,
1047 struct uart_sunsab_port *up = dev_get_drvdata(&op->dev);
1049 uart_remove_one_port(&sunsab_reg, &up[1].port);
1050 uart_remove_one_port(&sunsab_reg, &up[0].port);
1052 up[1].port.membase,
1055 up[0].port.membase,