Lines Matching refs:tx_ctrl
175 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
252 .tx_ctrl = DEF_TX,
306 .tx_ctrl = DEF_TX,
362 .tx_ctrl = DEF_TX,
416 .tx_ctrl = DEF_TX,
2892 info->ioport[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3045 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3053 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3059 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3064 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3070 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3075 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3082 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3087 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3092 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3565 info->tx_ctrl &= 0x3F;
3568 info->tx_ctrl |= (0x80 | 0x40);
3570 info->ioport[REG_TR_CTRL] = info->tx_ctrl;