Lines Matching defs:buses
677 * them, we proceed to assigning numbers to the remaining buses in
684 u32 buses, i, j = 0;
689 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
690 primary = buses & 0xFF;
691 secondary = (buses >> 8) & 0xFF;
692 subordinate = (buses >> 16) & 0xFF;
725 * scan remaining child buses.
756 buses & ~0xffffff);
768 buses = (buses & 0xff000000)
778 buses &= ~0xff000000;
779 buses |= CARDBUS_LATENCY_TIMER << 24;
785 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
790 * Adjust subordinate busnr in parent buses.
796 /* Now we can scan all subordinate buses... */
1376 /* Reserve buses for SR-IOV capability. */
1407 * Return how far we've got finding sub-buses.
1506 * Scan a PCI bus and child buses for new devices, adds them,