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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/pci/

Lines Matching refs:iommu

12 #include <linux/intel-iommu.h>
50 struct intel_iommu *iommu;
59 struct irq_2_iommu *iommu;
61 iommu = kzalloc_node(sizeof(*iommu), GFP_ATOMIC, node);
64 return iommu;
126 if (!irq_iommu->iommu)
154 *entry = *(irq_iommu->iommu->ir_table->base + index);
160 int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
162 struct ir_table *table = iommu->ir_table;
188 if (mask > ecap_max_handle_mask(iommu->ecap)) {
192 ecap_max_handle_mask(iommu->ecap));
224 irq_iommu->iommu = iommu;
234 static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)
242 return qi_submit_sync(&desc, iommu);
264 int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
279 irq_iommu->iommu = iommu;
289 int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index)
301 irq_iommu->iommu = NULL;
316 struct intel_iommu *iommu;
327 iommu = irq_iommu->iommu;
330 irte = &iommu->ir_table->base[index];
334 __iommu_flush_cache(iommu, irte, sizeof(*irte));
336 rc = qi_flush_iec(iommu, index, 0);
346 struct intel_iommu *iommu;
357 iommu = irq_iommu->iommu;
361 rc = qi_flush_iec(iommu, index, irq_iommu->irte_mask);
373 return ir_hpet[i].iommu;
383 return ir_ioapic[i].iommu;
395 return drhd->iommu;
401 struct intel_iommu *iommu;
407 iommu = irq_iommu->iommu;
410 start = iommu->ir_table->base + index;
418 return qi_flush_iec(iommu, index, irq_iommu->irte_mask);
436 irq_iommu->iommu = NULL;
563 static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
569 addr = virt_to_phys((void *)iommu->ir_table->base);
571 spin_lock_irqsave(&iommu->register_lock, flags);
573 dmar_writeq(iommu->reg + DMAR_IRTA_REG,
577 iommu->gcmd |= DMA_GCMD_SIRTP;
578 writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
580 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
582 spin_unlock_irqrestore(&iommu->register_lock, flags);
588 qi_global_iec(iommu);
590 spin_lock_irqsave(&iommu->register_lock, flags);
593 iommu->gcmd |= DMA_GCMD_IRE;
594 writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
596 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
599 spin_unlock_irqrestore(&iommu->register_lock, flags);
603 static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
608 ir_table = iommu->ir_table = kzalloc(sizeof(struct ir_table),
611 if (!iommu->ir_table)
614 pages = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO,
620 kfree(iommu->ir_table);
626 iommu_set_intr_remapping(iommu, mode);
633 static void iommu_disable_intr_remapping(struct intel_iommu *iommu)
638 if (!ecap_ir_support(iommu->ecap))
645 qi_global_iec(iommu);
647 spin_lock_irqsave(&iommu->register_lock, flags);
649 sts = dmar_readq(iommu->reg + DMAR_GSTS_REG);
653 iommu->gcmd &= ~DMA_GCMD_IRE;
654 writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
656 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
660 spin_unlock_irqrestore(&iommu->register_lock, flags);
674 struct intel_iommu *iommu = drhd->iommu;
676 if (!ecap_ir_support(iommu->ecap))
694 struct intel_iommu *iommu = drhd->iommu;
700 if (iommu->qi)
706 dmar_fault(-1, iommu);
712 iommu_disable_intr_remapping(iommu);
714 dmar_disable_qi(iommu);
721 struct intel_iommu *iommu = drhd->iommu;
723 if (!ecap_ir_support(iommu->ecap))
726 if (eim && !ecap_eim_support(iommu->ecap)) {
728 " ecap %Lx\n", drhd->reg_base_addr, iommu->ecap);
738 struct intel_iommu *iommu = drhd->iommu;
739 ret = dmar_enable_qi(iommu);
744 drhd->reg_base_addr, iommu->ecap, ret);
753 struct intel_iommu *iommu = drhd->iommu;
755 if (!ecap_ir_support(iommu->ecap))
758 if (setup_intr_remapping(iommu, eim))
779 struct intel_iommu *iommu)
801 ir_hpet[ir_hpet_num].iommu = iommu;
807 struct intel_iommu *iommu)
830 ir_ioapic[ir_ioapic_num].iommu = iommu;
836 struct intel_iommu *iommu)
857 drhd->address, iommu->seq_id);
859 ir_parse_one_ioapic_scope(scope, iommu);
870 ir_parse_one_hpet_scope(scope, iommu);
888 struct intel_iommu *iommu = drhd->iommu;
890 if (ecap_ir_support(iommu->ecap)) {
891 if (ir_parse_ioapic_hpet_scope(drhd->hdr, iommu))
910 struct intel_iommu *iommu = NULL;
915 for_each_iommu(iommu, drhd) {
916 if (!ecap_ir_support(iommu->ecap))
919 iommu_disable_intr_remapping(iommu);
927 struct intel_iommu *iommu = NULL;
929 for_each_iommu(iommu, drhd)
930 if (iommu->qi)
931 dmar_reenable_qi(iommu);
936 for_each_iommu(iommu, drhd) {
937 if (!ecap_ir_support(iommu->ecap))
940 /* Set up interrupt remapping for iommu.*/
941 iommu_set_intr_remapping(iommu, eim);