Lines Matching defs:mem_crb
946 void __iomem *mem_crb;
955 mem_crb = qlcnic_get_ioaddr(adapter,
961 mem_crb = qlcnic_get_ioaddr(adapter,
976 writel(off8, (mem_crb + MIU_TEST_AGT_ADDR_LO));
977 writel(0, (mem_crb + MIU_TEST_AGT_ADDR_HI));
980 writel(TA_CTL_ENABLE, (mem_crb + TEST_AGT_CTRL));
982 (mem_crb + TEST_AGT_CTRL));
985 temp = readl(mem_crb + TEST_AGT_CTRL);
996 writel(readl(mem_crb + MIU_TEST_AGT_RDDATA(i)),
997 mem_crb + MIU_TEST_AGT_WRDATA(i));
998 writel(readl(mem_crb + MIU_TEST_AGT_RDDATA(i+1)),
999 mem_crb + MIU_TEST_AGT_WRDATA(i+1));
1003 mem_crb + MIU_TEST_AGT_WRDATA(i));
1005 mem_crb + MIU_TEST_AGT_WRDATA(i+1));
1007 writel((TA_CTL_ENABLE | TA_CTL_WRITE), (mem_crb + TEST_AGT_CTRL));
1009 (mem_crb + TEST_AGT_CTRL));
1012 temp = readl(mem_crb + TEST_AGT_CTRL);
1038 void __iomem *mem_crb;
1047 mem_crb = qlcnic_get_ioaddr(adapter,
1053 mem_crb = qlcnic_get_ioaddr(adapter,
1070 writel(off8, (mem_crb + MIU_TEST_AGT_ADDR_LO));
1071 writel(0, (mem_crb + MIU_TEST_AGT_ADDR_HI));
1072 writel(TA_CTL_ENABLE, (mem_crb + TEST_AGT_CTRL));
1073 writel((TA_CTL_START | TA_CTL_ENABLE), (mem_crb + TEST_AGT_CTRL));
1076 temp = readl(mem_crb + TEST_AGT_CTRL);
1091 temp = readl(mem_crb + off8 + 4);
1093 val |= readl(mem_crb + off8);