Lines Matching defs:ctrl_reg
73 u32 ctrl_reg;
75 ctrl_reg = IXGB_CTRL0_RST |
85 IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg);
87 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
92 ctrl_reg = IXGB_READ_REG(hw, CTRL0);
95 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST));
99 ctrl_reg = /* Enable interrupt from XFP and SerDes */
105 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg);
112 return ctrl_reg;
123 u32 ctrl_reg;
160 ctrl_reg = ixgb_mac_reset(hw);
169 return (ctrl_reg & IXGB_CTRL0_RST);
299 u32 ctrl_reg;
311 ctrl_reg = ixgb_mac_reset(hw);
636 u32 ctrl_reg;
643 ctrl_reg = IXGB_READ_REG(hw, CTRL0);
646 ctrl_reg &= ~(IXGB_CTRL0_RPE | IXGB_CTRL0_TPE);
660 ctrl_reg |= (IXGB_CTRL0_CMDC);
666 ctrl_reg |= (IXGB_CTRL0_RPE);
672 ctrl_reg |= (IXGB_CTRL0_TPE);
679 ctrl_reg |= (IXGB_CTRL0_RPE | IXGB_CTRL0_TPE);
690 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);