Lines Matching refs:at91_mci_read
102 #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
162 imr = at91_mci_read(host, AT91_MCI_IMR);
167 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
168 sdcr = at91_mci_read(host, AT91_MCI_SDCR);
169 dtor = at91_mci_read(host, AT91_MCI_DTOR);
182 at91_mci_read(host, AT91_MCI_SR);
447 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
451 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
453 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
521 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
536 mr = at91_mci_read(host, AT91_MCI_MR) & 0x5fff;
643 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
644 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
645 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
646 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
649 status, at91_mci_read(host, AT91_MCI_SR),
729 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
733 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
737 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
765 int_status = at91_mci_read(host, AT91_MCI_SR);
766 int_mask = at91_mci_read(host, AT91_MCI_IMR);
880 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);