Lines Matching defs:ioc
163 static int mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req,
165 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
168 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
169 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
170 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
171 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
173 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
174 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
175 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
176 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
177 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
178 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
179 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
180 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
181 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
182 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
183 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
184 static int PrimeIocFifos(MPT_ADAPTER *ioc);
185 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
186 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
187 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
188 static int GetLanConfigPages(MPT_ADAPTER *ioc);
189 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
190 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
191 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
192 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
193 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
194 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
195 static void mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
196 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch,
198 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
199 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
200 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
207 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
209 static int ProcessEventNotification(MPT_ADAPTER *ioc,
211 static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
212 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
213 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
214 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info , u8 cb_idx);
215 static int mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
216 static void mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
251 MPT_ADAPTER *ioc;
256 list_for_each_entry(ioc, &ioc_list, list)
257 ioc->debug_level = mpt_debug_level;
280 * @ioc: per adatper instance
285 mpt_is_discovery_complete(MPT_ADAPTER *ioc)
301 if ((mpt_config(ioc, &cfg)))
306 buffer = pci_alloc_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
314 if ((mpt_config(ioc, &cfg)))
322 pci_free_consistent(ioc->pcidev, hdr.ExtPageLength * 4,
329 * mpt_fault_reset_work - work performed on workq after ioc fault
330 * @work: input argument, used to derive ioc
336 MPT_ADAPTER *ioc =
342 if (ioc->ioc_reset_in_progress || !ioc->active)
345 ioc_raw_state = mpt_GetIocState(ioc, 0);
348 ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
350 ioc->name, __func__);
351 rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
352 printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
354 ioc_raw_state = mpt_GetIocState(ioc, 0);
357 "reset (%04xh)\n", ioc->name, ioc_raw_state &
359 } else if (ioc->bus_type == SAS && ioc->sas_discovery_quiesce_io) {
360 if ((mpt_is_discovery_complete(ioc))) {
361 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "clearing "
362 "discovery_quiesce_io flag\n", ioc->name));
363 ioc->sas_discovery_quiesce_io = 0;
371 if (ioc->alt_ioc)
372 ioc = ioc->alt_ioc;
375 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
376 if (ioc->reset_work_q)
377 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
379 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
387 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
394 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
395 ioc->name, pa));
401 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
416 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
417 mpt_free_msg_frame(ioc, mf);
437 __func__, ioc->name, cb_idx);
441 if (MptCallbacks[cb_idx](ioc, mf, mr))
442 mpt_free_msg_frame(ioc, mf);
448 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
470 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
471 (reply_dma_low - ioc->reply_frames_low_dma));
475 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
477 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
478 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
479 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr);
486 if (ioc->bus_type == FC)
487 mpt_fc_log_info(ioc, log_info);
488 else if (ioc->bus_type == SPI)
489 mpt_spi_log_info(ioc, log_info);
490 else if (ioc->bus_type == SAS)
491 mpt_sas_log_info(ioc, log_info, cb_idx);
495 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
501 __func__, ioc->name, cb_idx);
506 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
510 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
513 mpt_free_msg_frame(ioc, mf);
537 MPT_ADAPTER *ioc = bus_id;
538 u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
548 mpt_reply(ioc, pa);
550 mpt_turbo_reply(ioc, pa);
551 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
560 * @ioc: Pointer to MPT_ADAPTER structure
572 mptbase_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply)
583 ProcessEventNotification(ioc, pEventReply, &evHandlers);
591 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_COMMAND_GOOD;
593 ioc->mptbase_cmds.status |= MPT_MGMT_STATUS_RF_VALID;
594 memcpy(ioc->mptbase_cmds.reply, reply,
598 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
599 ioc->mptbase_cmds.status &= ~MPT_MGMT_STATUS_PENDING;
600 complete(&ioc->mptbase_cmds.done);
603 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_FREE_MF)
607 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
608 "EventAck reply received\n", ioc->name));
613 ioc->name, reply->u.hdr.Function);
777 MPT_ADAPTER *ioc;
786 list_for_each_entry(ioc, &ioc_list, list) {
787 id = ioc->pcidev->driver ?
788 ioc->pcidev->driver->id_table : NULL;
790 dd_cbfunc->probe(ioc->pcidev, id);
805 MPT_ADAPTER *ioc;
812 list_for_each_entry(ioc, &ioc_list, list) {
814 dd_cbfunc->remove(ioc->pcidev);
825 * @ioc: Pointer to MPT adapter structure
834 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
840 /* validate handle and ioc identifier */
843 if (!ioc->active)
845 "returning NULL!\n", ioc->name);
849 if (!ioc->active)
852 spin_lock_irqsave(&ioc->FreeQlock, flags);
853 if (!list_empty(&ioc->FreeQ)) {
856 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
861 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
863 req_idx = req_offset / ioc->req_sz;
867 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame;
869 ioc->mfcnt++;
874 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
879 "Count 0x%x Max 0x%x\n", ioc->name, ioc->mfcnt,
880 ioc->req_depth);
883 printk(MYIOC_s_INFO_FMT "MF Count 0x%x Max 0x%x \n", ioc->name,
884 ioc->mfcnt, ioc->req_depth);
887 dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_get_msg_frame(%d,%d), got mf=%p\n",
888 ioc->name, cb_idx, ioc->id, mf));
896 * @ioc: Pointer to MPT adapter structure
903 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
911 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
913 req_idx = req_offset / ioc->req_sz;
917 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
919 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
920 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d "
921 "RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx,
922 ioc->RequestNB[req_idx]));
923 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
929 * @ioc: Pointer to MPT adapter structure
939 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
947 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
948 req_idx = req_offset / ioc->req_sz;
952 DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
954 mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
955 dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
956 ioc->name, mf_dma_addr, req_idx));
957 CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
963 * @ioc: Pointer to MPT adapter structure
970 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
975 spin_lock_irqsave(&ioc->FreeQlock, flags);
980 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
982 ioc->mfcnt--;
985 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
1102 * @ioc: Pointer to MPT adapter structure
1116 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
1132 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
1133 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
1140 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1142 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1147 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
1152 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1155 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_send_handshake_request start, WaitCnt=%d\n",
1156 ioc->name, ii));
1158 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1160 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1173 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1174 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1180 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1186 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1194 * @ioc: Pointer to MPT adapter structure
1211 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1216 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1220 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1222 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1228 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1237 * @ioc: Pointer to pointer to IOC adapter
1238 * @ioc_init: Pointer to ioc init config page
1244 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1250 if(!ioc->HostPageBuffer) {
1253 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1261 if((ioc->HostPageBuffer = pci_alloc_consistent(
1262 ioc->pcidev,
1264 &ioc->HostPageBuffer_dma)) != NULL) {
1266 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1268 ioc->name, ioc->HostPageBuffer,
1269 (u32)ioc->HostPageBuffer_dma,
1271 ioc->alloc_total += host_page_buffer_sz;
1272 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1280 if(!ioc->HostPageBuffer) {
1283 ioc->name);
1293 flags_length |= ioc->HostPageBuffer_sz;
1294 ioc->add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1295 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1315 MPT_ADAPTER *ioc;
1317 list_for_each_entry(ioc,&ioc_list,list) {
1318 if (ioc->id == iocid) {
1319 *iocpp =ioc;
1572 * @ioc: Pointer to pointer to IOC adapter
1576 mpt_mapresources(MPT_ADAPTER *ioc)
1588 pdev = ioc->pcidev;
1589 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1592 "failed\n", ioc->name);
1595 if (pci_request_selected_regions(pdev, ioc->bars, "mpt")) {
1597 "MEM failed\n", ioc->name);
1610 ioc->dma_mask = DMA_BIT_MASK(64);
1611 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1613 ioc->name));
1617 ioc->dma_mask = DMA_BIT_MASK(32);
1618 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1620 ioc->name));
1623 ioc->name, pci_name(pdev));
1624 pci_release_selected_regions(pdev, ioc->bars);
1631 ioc->dma_mask = DMA_BIT_MASK(32);
1632 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
1634 ioc->name));
1637 ioc->name, pci_name(pdev));
1638 pci_release_selected_regions(pdev, ioc->bars);
1660 ioc->mem_size = msize;
1668 " memory!\n", ioc->name);
1669 pci_release_selected_regions(pdev, ioc->bars);
1672 ioc->memmap = mem;
1673 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1674 ioc->name, mem, (unsigned long long)mem_phys));
1676 ioc->mem_phys = mem_phys;
1677 ioc->chip = (SYSIF_REGS __iomem *)mem;
1680 ioc->pio_mem_phys = port;
1681 ioc->pio_chip = (SYSIF_REGS __iomem *)port;
1707 MPT_ADAPTER *ioc;
1717 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1718 if (ioc == NULL) {
1723 ioc->id = mpt_ids++;
1724 sprintf(ioc->name, "ioc%d", ioc->id);
1725 dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1732 ioc->debug_level = mpt_debug_level;
1736 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": mpt_adapter_install\n", ioc->name));
1738 ioc->pcidev = pdev;
1739 if (mpt_mapresources(ioc)) {
1740 kfree(ioc);
1747 if (ioc->dma_mask == DMA_BIT_MASK(64)) {
1749 ioc->add_sge = &mpt_add_sge_64bit_1078;
1751 ioc->add_sge = &mpt_add_sge_64bit;
1752 ioc->add_chain = &mpt_add_chain_64bit;
1753 ioc->sg_addr_size = 8;
1755 ioc->add_sge = &mpt_add_sge;
1756 ioc->add_chain = &mpt_add_chain;
1757 ioc->sg_addr_size = 4;
1759 ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
1761 ioc->alloc_total = sizeof(MPT_ADAPTER);
1762 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1763 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1766 spin_lock_init(&ioc->taskmgmt_lock);
1767 mutex_init(&ioc->internal_cmds.mutex);
1768 init_completion(&ioc->internal_cmds.done);
1769 mutex_init(&ioc->mptbase_cmds.mutex);
1770 init_completion(&ioc->mptbase_cmds.done);
1771 mutex_init(&ioc->taskmgmt_cmds.mutex);
1772 init_completion(&ioc->taskmgmt_cmds.done);
1776 ioc->eventTypes = 0; /* None */
1777 ioc->eventContext = 0;
1778 ioc->eventLogSize = 0;
1779 ioc->events = NULL;
1782 ioc->mfcnt = 0;
1785 ioc->sh = NULL;
1786 ioc->cached_fw = NULL;
1790 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1794 INIT_LIST_HEAD(&ioc->fc_rports);
1797 INIT_LIST_HEAD(&ioc->list);
1801 INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
1803 snprintf(ioc->reset_work_q_name, MPT_KOBJ_NAME_LEN,
1804 "mpt_poll_%d", ioc->id);
1805 ioc->reset_work_q =
1806 create_singlethread_workqueue(ioc->reset_work_q_name);
1807 if (!ioc->reset_work_q) {
1809 ioc->name);
1810 pci_release_selected_regions(pdev, ioc->bars);
1811 kfree(ioc);
1815 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
1816 ioc->name, &ioc->facts, &ioc->pfacts[0]));
1819 mpt_get_product_name(pdev->vendor, pdev->device, revision, ioc->prod_name);
1825 ioc->errata_flag_1064 = 1;
1830 ioc->bus_type = FC;
1848 ioc->bus_type = FC;
1858 ioc->bus_type = FC;
1872 ioc->bus_type = SPI;
1877 ioc->errata_flag_1064 = 1;
1878 ioc->bus_type = SAS;
1884 ioc->bus_type = SAS;
1889 switch (ioc->bus_type) {
1892 ioc->msi_enable = mpt_msi_enable_sas;
1896 ioc->msi_enable = mpt_msi_enable_spi;
1900 ioc->msi_enable = mpt_msi_enable_fc;
1904 ioc->msi_enable = 0;
1908 ioc->fw_events_off = 1;
1910 if (ioc->errata_flag_1064)
1913 spin_lock_init(&ioc->FreeQlock);
1916 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1917 ioc->active = 0;
1918 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1921 pci_set_drvdata(ioc->pcidev, ioc);
1924 list_add_tail(&ioc->list, &ioc_list);
1928 mpt_detect_bound_ports(ioc, pdev);
1930 INIT_LIST_HEAD(&ioc->fw_event_list);
1931 spin_lock_init(&ioc->fw_event_lock);
1932 snprintf(ioc->fw_event_q_name, MPT_KOBJ_NAME_LEN, "mpt/%d", ioc->id);
1933 ioc->fw_event_q = create_singlethread_workqueue(ioc->fw_event_q_name);
1935 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1938 ioc->name, r);
1940 list_del(&ioc->list);
1941 if (ioc->alt_ioc)
1942 ioc->alt_ioc->alt_ioc = NULL;
1943 iounmap(ioc->memmap);
1945 pci_release_selected_regions(pdev, ioc->bars);
1947 destroy_workqueue(ioc->reset_work_q);
1948 ioc->reset_work_q = NULL;
1950 kfree(ioc);
1967 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1969 proc_create_data("info", S_IRUGO, dent, &mpt_iocinfo_proc_fops, ioc);
1970 proc_create_data("summary", S_IRUGO, dent, &mpt_summary_proc_fops, ioc);
1974 if (!ioc->alt_ioc)
1975 queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
1990 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1997 * Stop polling ioc for fault condition
1999 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
2000 wq = ioc->reset_work_q;
2001 ioc->reset_work_q = NULL;
2002 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
2003 cancel_delayed_work(&ioc->fault_reset_work);
2006 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2007 wq = ioc->fw_event_q;
2008 ioc->fw_event_q = NULL;
2009 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2012 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
2014 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
2016 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
2028 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2030 ioc->active = 0;
2034 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2036 CHIPREG_READ32(&ioc->chip->IntStatus);
2038 mpt_adapter_dispose(ioc);
2056 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2060 "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2063 /* put ioc into READY_STATE */
2064 if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
2066 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
2070 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2071 ioc->active = 0;
2074 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2076 free_irq(ioc->pci_irq, ioc);
2077 if (ioc->msi_enable)
2078 pci_disable_msi(ioc->pcidev);
2079 ioc->pci_irq = -1;
2082 pci_release_selected_regions(pdev, ioc->bars);
2095 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
2101 "operating state [D%d]\n", ioc->name, pdev, pci_name(pdev),
2107 ioc->pcidev = pdev;
2108 err = mpt_mapresources(ioc);
2112 if (ioc->dma_mask == DMA_BIT_MASK(64)) {
2114 ioc->add_sge = &mpt_add_sge_64bit_1078;
2116 ioc->add_sge = &mpt_add_sge_64bit;
2117 ioc->add_chain = &mpt_add_chain_64bit;
2118 ioc->sg_addr_size = 8;
2121 ioc->add_sge = &mpt_add_sge;
2122 ioc->add_chain = &mpt_add_chain;
2123 ioc->sg_addr_size = 4;
2125 ioc->SGE_size = sizeof(u32) + ioc->sg_addr_size;
2127 printk(MYIOC_s_INFO_FMT "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
2128 ioc->name, (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
2129 CHIPREG_READ32(&ioc->chip->Doorbell));
2131 if (ioc->bus_type == SAS && (pdev->device ==
2134 if (KickStart(ioc, 1, CAN_SLEEP) < 0) {
2136 ioc->name);
2141 /* bring ioc to operational state */
2142 printk(MYIOC_s_INFO_FMT "Sending mpt_do_ioc_recovery\n", ioc->name);
2143 recovery_state = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
2147 "error:[%x]\n", ioc->name, recovery_state);
2150 "pci-resume: success\n", ioc->name);
2158 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
2161 ioc->bus_type != SPI) ||
2163 ioc->bus_type != FC) ||
2165 ioc->bus_type != SAS))
2169 return (MptResetHandlers[index])(ioc, reset_phase);
2175 * @ioc: Pointer to MPT adapter structure
2195 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
2207 printk(MYIOC_s_INFO_FMT "Initiating %s\n", ioc->name,
2211 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2212 ioc->active = 0;
2214 if (ioc->alt_ioc) {
2215 if (ioc->alt_ioc->active ||
2221 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2223 ioc->alt_ioc->active = 0;
2231 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
2234 ioc->name);
2236 if (reset_alt_ioc_active && ioc->alt_ioc) {
2238 dprintk(ioc, printk(MYIOC_s_INFO_FMT
2239 "alt_ioc reply irq re-enabled\n", ioc->alt_ioc->name));
2240 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2241 ioc->alt_ioc->active = 1;
2246 "NOT READY WARNING!\n", ioc->name);
2255 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
2256 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
2260 ": alt-ioc Not ready WARNING!\n",
2261 ioc->alt_ioc->name);
2266 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
2272 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2273 "Retry IocFacts failed rc=%x\n", ioc->name, rc));
2276 MptDisplayIocCapabilities(ioc);
2280 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
2281 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2283 ioc->name, rc));
2286 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
2289 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2290 "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
2294 MptDisplayIocCapabilities(ioc->alt_ioc);
2299 (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)) {
2300 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2301 ioc->bars = pci_select_bars(ioc->pcidev, IORESOURCE_MEM |
2303 if (pci_enable_device(ioc->pcidev))
2305 if (pci_request_selected_regions(ioc->pcidev, ioc->bars,
2316 ioc->pci_irq = -1;
2317 if (ioc->pcidev->irq) {
2318 if (ioc->msi_enable && !pci_enable_msi(ioc->pcidev))
2320 ioc->name);
2322 ioc->msi_enable = 0;
2323 rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
2324 IRQF_SHARED, ioc->name, ioc);
2328 ioc->name, ioc->pcidev->irq);
2329 if (ioc->msi_enable)
2330 pci_disable_msi(ioc->pcidev);
2335 ioc->pci_irq = ioc->pcidev->irq;
2336 pci_set_master(ioc->pcidev); /* ?? */
2337 pci_set_drvdata(ioc->pcidev, ioc);
2338 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2339 "installed at interrupt %d\n", ioc->name,
2340 ioc->pcidev->irq));
2347 * If fails, continue with alt-ioc processing
2349 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "PrimeIocFifos\n",
2350 ioc->name));
2351 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2355 * If fails, continue with alt-ioc processing
2357 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "SendIocInit\n",
2358 ioc->name));
2359 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2362 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2364 ": alt-ioc (%d) FIFO mgmt alloc WARNING!\n",
2365 ioc->alt_ioc->name, rc);
2371 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2375 ": alt-ioc: (%d) init failure WARNING!\n",
2376 ioc->alt_ioc->name, rc);
2381 if (ioc->upload_fw) {
2382 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2383 "firmware upload required!\n", ioc->name));
2388 rc = mpt_do_upload(ioc, sleepFlag);
2390 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2398 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2400 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2401 ioc->cached_fw = NULL;
2405 "firmware upload failure!\n", ioc->name);
2415 if ((ret == 0) && (!ioc->facts.EventState)) {
2416 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2418 ioc->name));
2419 ret = SendEventNotification(ioc, 1, sleepFlag); /* 1=Enable */
2422 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2423 rc = SendEventNotification(ioc->alt_ioc, 1, sleepFlag);
2427 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2428 ioc->active = 1;
2430 if (rc == 0) { /* alt ioc */
2431 if (reset_alt_ioc_active && ioc->alt_ioc) {
2433 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "alt-ioc"
2435 ioc->alt_ioc->name));
2436 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask,
2438 ioc->alt_ioc->active = 1;
2454 mutex_init(&ioc->raid_data.inactive_list_mutex);
2455 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2457 switch (ioc->bus_type) {
2461 if(ioc->facts.IOCExceptions &
2463 ret = mptbase_sas_persist_operation(ioc,
2471 mpt_findImVolumes(ioc);
2475 mpt_read_ioc_pg_1(ioc);
2480 if ((ioc->pfacts[0].ProtocolFlags &
2482 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2487 (void) GetLanConfigPages(ioc);
2488 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2489 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2492 ioc->name, a[5], a[4],
2500 mpt_GetScsiPortSettings(ioc, 0);
2504 mpt_readScsiDevicePageHeaders(ioc, 0);
2508 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2509 mpt_findImVolumes(ioc);
2513 mpt_read_ioc_pg_1(ioc);
2515 mpt_read_ioc_pg_4(ioc);
2520 GetIoUnitPage2(ioc);
2521 mpt_get_manufacturing_pg_0(ioc);
2526 free_irq(ioc->pci_irq, ioc);
2527 if (ioc->msi_enable)
2528 pci_disable_msi(ioc->pcidev);
2536 * @ioc: Pointer to MPT adapter structure
2547 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2554 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2556 ioc->name, pci_name(pdev), pdev->bus->number,
2570 if (ioc->alt_ioc != NULL) {
2573 ioc->name, ioc->name, ioc->alt_ioc->name);
2582 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2584 ioc->name, ioc->name, ioc_srch->name));
2585 ioc_srch->alt_ioc = ioc;
2586 ioc->alt_ioc = ioc_srch;
2595 * @ioc: Pointer to MPT adapter structure
2598 mpt_adapter_disable(MPT_ADAPTER *ioc)
2603 if (ioc->cached_fw != NULL) {
2604 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2605 "%s: Pushing FW onto adapter\n", __func__, ioc->name));
2606 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)
2607 ioc->cached_fw, CAN_SLEEP)) < 0) {
2610 ioc->name, ret);
2617 if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY) {
2618 if (!SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET,
2620 if (mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_READY)
2622 "reset failed to put ioc in ready state!\n",
2623 ioc->name, __func__);
2626 "failed!\n", ioc->name, __func__);
2631 synchronize_irq(ioc->pcidev->irq);
2632 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2633 ioc->active = 0;
2636 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2637 CHIPREG_READ32(&ioc->chip->IntStatus);
2639 if (ioc->alloc != NULL) {
2640 sz = ioc->alloc_sz;
2641 dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free @ %p, sz=%d bytes\n",
2642 ioc->name, ioc->alloc, ioc->alloc_sz));
2643 pci_free_consistent(ioc->pcidev, sz,
2644 ioc->alloc, ioc->alloc_dma);
2645 ioc->reply_frames = NULL;
2646 ioc->req_frames = NULL;
2647 ioc->alloc = NULL;
2648 ioc->alloc_total -= sz;
2651 if (ioc->sense_buf_pool != NULL) {
2652 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2653 pci_free_consistent(ioc->pcidev, sz,
2654 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2655 ioc->sense_buf_pool = NULL;
2656 ioc->alloc_total -= sz;
2659 if (ioc->events != NULL){
2661 kfree(ioc->events);
2662 ioc->events = NULL;
2663 ioc->alloc_total -= sz;
2666 mpt_free_fw_memory(ioc);
2668 kfree(ioc->spi_data.nvram);
2669 mpt_inactive_raid_list_free(ioc);
2670 kfree(ioc->raid_data.pIocPg2);
2671 kfree(ioc->raid_data.pIocPg3);
2672 ioc->spi_data.nvram = NULL;
2673 ioc->raid_data.pIocPg3 = NULL;
2675 if (ioc->spi_data.pIocPg4 != NULL) {
2676 sz = ioc->spi_data.IocPg4Sz;
2677 pci_free_consistent(ioc->pcidev, sz,
2678 ioc->spi_data.pIocPg4,
2679 ioc->spi_data.IocPg4_dma);
2680 ioc->spi_data.pIocPg4 = NULL;
2681 ioc->alloc_total -= sz;
2684 if (ioc->ReqToChain != NULL) {
2685 kfree(ioc->ReqToChain);
2686 kfree(ioc->RequestNB);
2687 ioc->ReqToChain = NULL;
2690 kfree(ioc->ChainToChain);
2691 ioc->ChainToChain = NULL;
2693 if (ioc->HostPageBuffer != NULL) {
2694 if((ret = mpt_host_page_access_control(ioc,
2698 ioc->name, __func__, ret);
2700 dexitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2702 ioc->name, ioc->HostPageBuffer,
2703 ioc->HostPageBuffer_sz));
2704 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2705 ioc->HostPageBuffer, ioc->HostPageBuffer_dma);
2706 ioc->HostPageBuffer = NULL;
2707 ioc->HostPageBuffer_sz = 0;
2708 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2711 pci_set_drvdata(ioc->pcidev, NULL);
2716 * @ioc: Pointer to MPT adapter structure
2722 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2726 if (ioc == NULL)
2729 sz_first = ioc->alloc_total;
2731 mpt_adapter_disable(ioc);
2733 if (ioc->pci_irq != -1) {
2734 free_irq(ioc->pci_irq, ioc);
2735 if (ioc->msi_enable)
2736 pci_disable_msi(ioc->pcidev);
2737 ioc->pci_irq = -1;
2740 if (ioc->memmap != NULL) {
2741 iounmap(ioc->memmap);
2742 ioc->memmap = NULL;
2745 pci_disable_device(ioc->pcidev);
2746 pci_release_selected_regions(ioc->pcidev, ioc->bars);
2750 list_del(&ioc->list);
2752 sz_last = ioc->alloc_total;
2753 dprintk(ioc, printk(MYIOC_s_INFO_FMT "free'd %d of %d bytes\n",
2754 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2756 if (ioc->alt_ioc)
2757 ioc->alt_ioc->alt_ioc = NULL;
2759 kfree(ioc);
2765 * @ioc: Pointer to MPT adapter structure
2768 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2772 printk(KERN_INFO "%s: ", ioc->name);
2773 if (ioc->prod_name)
2774 printk("%s: ", ioc->prod_name);
2777 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2782 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2787 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2799 * @ioc: Pointer to MPT_ADAPTER structure
2812 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2823 ioc_state = mpt_GetIocState(ioc, 0);
2824 dhsprintk(ioc, printk(MYIOC_s_INFO_FMT "MakeIocReady [raw] state=%08x\n", ioc->name, ioc_state));
2833 ioc->name);
2839 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2840 "IOC is in READY state\n", ioc->name));
2850 ioc->name);
2852 ioc->name, ioc_state & MPI_DOORBELL_DATA_MASK);
2859 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2860 ioc->name));
2868 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT
2870 ioc->name, whoinit, statefault, force));
2875 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2882 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2892 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2898 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2899 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2907 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2908 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2917 ioc->name, ioc_state, (int)((ii+5)/HZ));
2930 printk(MYIOC_s_INFO_FMT "Recovered from %s\n", ioc->name,
2940 * @ioc: Pointer to MPT_ADAPTER structure
2947 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2952 s = CHIPREG_READ32(&ioc->chip->Doorbell);
2956 ioc->last_state = sc;
2964 * @ioc: Pointer to MPT_ADAPTER structure
2971 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
2983 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2986 ioc->name, ioc->last_state);
2990 facts = &ioc->facts;
3003 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3005 ioc->name, req_sz, reply_sz));
3010 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
3028 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
3029 ioc->FirstWhoInit = facts->WhoInit;
3061 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
3063 ioc->ir_firmware = 1;
3094 ioc->name);
3100 ioc->NB_for_64_byte_frame = vv;
3106 ioc->NBShiftFactor = shiftFactor;
3107 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3109 ioc->name, vv, shiftFactor, r));
3116 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
3117 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
3118 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
3119 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
3121 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
3122 ioc->name, ioc->reply_sz, ioc->reply_depth));
3123 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz =%3d, req_depth =%4d\n",
3124 ioc->name, ioc->req_sz, ioc->req_depth));
3127 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
3133 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
3144 * @ioc: Pointer to MPT_ADAPTER structure
3151 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3161 if (ioc->last_state == MPI_IOC_STATE_RESET) {
3163 ioc->name, ioc->last_state );
3167 pfacts = &ioc->pfacts[portnum];
3181 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
3182 ioc->name, portnum));
3187 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
3205 max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
3207 ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
3208 ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
3216 ioc->devices_per_bus = 1;
3217 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
3226 * @ioc: Pointer to MPT_ADAPTER structure
3234 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
3253 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
3254 ioc->upload_fw = 1;
3256 ioc->upload_fw = 0;
3257 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
3258 ioc->name, ioc->upload_fw, ioc->facts.Flags));
3260 ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
3261 ioc_init.MaxBuses = (U8)ioc->number_of_buses;
3263 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
3264 ioc->name, ioc->facts.MsgVersion));
3265 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
3270 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
3271 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
3272 } else if(mpt_host_page_alloc(ioc, &ioc_init))
3275 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
3277 if (ioc->sg_addr_size == sizeof(u64)) {
3281 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
3282 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
3289 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
3290 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
3291 ioc->facts.MaxDevices = ioc_init.MaxDevices;
3292 ioc->facts.MaxBuses = ioc_init.MaxBuses;
3294 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
3295 ioc->name, &ioc_init));
3297 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
3300 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
3308 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
3309 ioc->name, &ioc_init));
3311 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
3312 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
3322 state = mpt_GetIocState(ioc, 1);
3332 ioc->name, (int)((count+5)/HZ));
3336 state = mpt_GetIocState(ioc, 1);
3339 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wait IOC_OPERATIONAL state (cnt=%d)\n",
3340 ioc->name, count));
3342 ioc->aen_event_read_flag=0;
3349 * @ioc: Pointer to MPT_ADAPTER structure
3358 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3379 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3380 ioc->name, portnum, &port_enable));
3384 if (ioc->ir_firmware || ioc->bus_type == SAS) {
3385 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3389 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3398 * @ioc: Pointer to MPT_ADAPTER structure
3407 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3411 if (ioc->cached_fw) {
3415 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3416 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
3417 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3421 ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma);
3422 if (!ioc->cached_fw) {
3424 ioc->name);
3427 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Image @ %p[%p], sz=%d[%x] bytes\n",
3428 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, size, size));
3429 ioc->alloc_total += size;
3438 * @ioc: Pointer to MPT_ADAPTER structure
3440 * If alt_img is NULL, delete from ioc structure.
3444 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3448 if (!ioc->cached_fw)
3451 sz = ioc->facts.FWImageSize;
3452 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
3453 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3454 pci_free_consistent(ioc->pcidev, sz, ioc->cached_fw, ioc->cached_fw_dma);
3455 ioc->alloc_total -= sz;
3456 ioc->cached_fw = NULL;
3462 * @ioc: Pointer to MPT_ADAPTER structure
3474 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3486 if ((sz = ioc->facts.FWImageSize) == 0)
3489 if (mpt_alloc_fw_memory(ioc, ioc->facts.FWImageSize) != 0)
3492 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
3493 ioc->name, ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3495 prequest = (sleepFlag == NO_SLEEP) ? kzalloc(ioc->req_sz, GFP_ATOMIC) :
3496 kzalloc(ioc->req_sz, GFP_KERNEL);
3498 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed "
3499 "while allocating memory \n", ioc->name));
3500 mpt_free_fw_memory(ioc);
3519 ioc->add_sge((char *)ptcsge, flagsLength, ioc->cached_fw_dma);
3521 ioc->SGE_size;
3522 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending FW Upload "
3523 " (req @ %p) fw_size=%d mf_request_size=%d\n", ioc->name, prequest,
3524 ioc->facts.FWImageSize, request_size));
3525 DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest);
3527 ii = mpt_handshake_req_reply_wait(ioc, request_size, (u32 *)prequest,
3530 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FW Upload completed "
3531 "rc=%x \n", ioc->name, ii));
3542 ioc->facts.FWImageSize ==
3546 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3547 ioc->name, cmdStatus));
3551 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "fw upload failed, "
3552 "freeing image \n", ioc->name));
3553 mpt_free_fw_memory(ioc);
3563 * @ioc: Pointer to MPT_ADAPTER structure
3575 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3587 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3588 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3590 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3591 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3592 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3593 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3594 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3595 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3597 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3606 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3607 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3610 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3612 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3613 ioc->name, count));
3625 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3627 ioc->name, diag0val));
3631 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3632 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3633 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3634 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3635 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3636 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3639 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3647 if (ioc->errata_flag_1064)
3648 pci_enable_io_access(ioc->pcidev);
3650 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3651 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3652 ioc->name, pFwHeader->LoadStartAddress));
3654 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3655 ioc->name, fwSize*4, ptrFw));
3657 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3669 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3670 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3671 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3674 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3680 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
3681 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3684 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3685 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3690 if (ioc->bus_type == SPI) {
3691 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3692 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3694 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3695 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3697 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3698 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3699 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3710 if (ioc->errata_flag_1064)
3711 pci_disable_io_access(ioc->pcidev);
3713 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3714 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3716 ioc->name, diag0val));
3718 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3719 ioc->name, diag0val));
3720 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3723 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3725 if (ioc->bus_type == SAS) {
3726 ioc_state = mpt_GetIocState(ioc, 0);
3727 if ( (GetIocFacts(ioc, sleepFlag,
3729 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3730 ioc->name, ioc_state));
3736 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3737 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3739 ioc->name, count, ioc_state));
3740 if (ioc->bus_type == SAS) {
3743 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3744 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3746 ioc->name));
3749 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3751 ioc->name));
3760 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3761 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3768 * @ioc: Pointer to MPT_ADAPTER structure
3792 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3798 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStarting!\n", ioc->name));
3799 if (ioc->bus_type == SPI) {
3803 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3812 hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3816 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3817 ioc->name));
3821 ioc_state = mpt_GetIocState(ioc, 1);
3823 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3824 ioc->name, cnt));
3834 dinitprintk(ioc, printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3835 ioc->name, mpt_GetIocState(ioc, 0)));
3842 * @ioc: Pointer to MPT_ADAPTER structure
3859 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3870 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3872 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3877 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3878 "address=%p\n", ioc->name, __func__,
3879 &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3880 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3894 (*(MptResetHandlers[cb_idx]))(ioc,
3899 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3902 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3905 ioc->name, doorbell, count));
3921 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3923 if (ioc->debug_level & MPT_DEBUG) {
3924 if (ioc->alt_ioc)
3925 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3926 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
3927 ioc->name, diag0val, diag1val));
3938 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3939 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3940 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3941 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3942 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3943 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3955 ioc->name, diag0val);
3960 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3962 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n",
3963 ioc->name, diag0val));
3966 if (ioc->debug_level & MPT_DEBUG) {
3967 if (ioc->alt_ioc)
3968 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3969 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n",
3970 ioc->name, diag0val, diag1val));
3976 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_DISABLE_ARM);
3983 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3985 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n",
3986 ioc->name));
3997 ioc, MPT_IOC_PRE_RESET);
3998 if (ioc->alt_ioc) {
4000 ioc->alt_ioc, MPT_IOC_PRE_RESET);
4005 if (ioc->cached_fw)
4006 cached_fw = (MpiFwHeader_t *)ioc->cached_fw;
4007 else if (ioc->alt_ioc && ioc->alt_ioc->cached_fw)
4008 cached_fw = (MpiFwHeader_t *)ioc->alt_ioc->cached_fw;
4017 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4022 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n",
4023 ioc->name, diag0val, count));
4031 if ((count = mpt_downloadboot(ioc, cached_fw, sleepFlag)) < 0) {
4033 "firmware downloadboot failure (%d)!\n", ioc->name, count);
4044 doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
4047 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4049 " count=%d\n", ioc->name, doorbell, count));
4065 "after reset! IocState=%x", ioc->name,
4070 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4071 if (ioc->debug_level & MPT_DEBUG) {
4072 if (ioc->alt_ioc)
4073 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4074 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n",
4075 ioc->name, diag0val, diag1val));
4081 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4087 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
4088 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
4089 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
4090 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
4091 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
4092 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
4104 ioc->name, diag0val);
4107 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4110 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
4111 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4114 ioc->name);
4119 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFFFFFFFF);
4123 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
4126 ioc->name, diag0val);
4130 if (ioc->debug_level & MPT_DEBUG) {
4131 if (ioc->alt_ioc)
4132 diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
4133 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n",
4134 ioc->name, diag0val, diag1val));
4140 ioc->facts.EventState = 0;
4142 if (ioc->alt_ioc)
4143 ioc->alt_ioc->facts.EventState = 0;
4151 * @ioc: Pointer to MPT_ADAPTER structure
4161 SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag)
4167 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n",
4168 ioc->name, reset_type));
4169 CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT);
4170 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4178 while ((state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
4187 ioc->name, state, (int)((count+5)/HZ));
4202 if (ioc->facts.Function)
4203 ioc->facts.EventState = 0;
4211 * @ioc: Pointer to MPT_ADAPTER structure
4217 initChainBuffers(MPT_ADAPTER *ioc)
4226 if (ioc->ReqToChain == NULL) {
4227 sz = ioc->req_depth * sizeof(int);
4232 ioc->ReqToChain = (int *) mem;
4233 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc @ %p, sz=%d bytes\n",
4234 ioc->name, mem, sz));
4239 ioc->RequestNB = (int *) mem;
4240 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc @ %p, sz=%d bytes\n",
4241 ioc->name, mem, sz));
4243 for (ii = 0; ii < ioc->req_depth; ii++) {
4244 ioc->ReqToChain[ii] = MPT_HOST_NO_CHAIN;
4257 scale = ioc->req_sz / ioc->SGE_size;
4258 if (ioc->sg_addr_size == sizeof(u64))
4259 num_sge = scale + (ioc->req_sz - 60) / ioc->SGE_size;
4261 num_sge = 1 + scale + (ioc->req_sz - 64) / ioc->SGE_size;
4263 if (ioc->sg_addr_size == sizeof(u64)) {
4264 numSGE = (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale +
4265 (ioc->req_sz - 60) / ioc->SGE_size;
4267 numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) +
4268 scale + (ioc->req_sz - 64) / ioc->SGE_size;
4270 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n",
4271 ioc->name, num_sge, numSGE));
4273 if (ioc->bus_type == FC) {
4288 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n",
4289 ioc->name, numSGE, num_sge, num_chain));
4291 if (ioc->bus_type == SPI)
4293 else if (ioc->bus_type == SAS)
4298 ioc->num_chain = num_chain;
4301 if (ioc->ChainToChain == NULL) {
4306 ioc->ChainToChain = (int *) mem;
4307 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n",
4308 ioc->name, mem, sz));
4310 mem = (u8 *) ioc->ChainToChain;
4319 * @ioc: Pointer to MPT_ADAPTER structure
4328 PrimeIocFifos(MPT_ADAPTER *ioc)
4341 if (ioc->reply_frames == NULL) {
4342 if ( (num_chain = initChainBuffers(ioc)) < 0)
4344 if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
4345 ioc->dma_mask > DMA_BIT_MASK(35)) {
4346 if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
4347 && !pci_set_consistent_dma_mask(ioc->pcidev,
4350 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4353 ioc->name));
4356 pci_set_dma_mask(ioc->pcidev,
4358 pci_set_consistent_dma_mask(ioc->pcidev,
4364 ioc->name);
4369 total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth);
4370 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n",
4371 ioc->name, ioc->reply_sz, ioc->reply_depth));
4372 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n",
4373 ioc->name, reply_sz, reply_sz));
4375 sz = (ioc->req_sz * ioc->req_depth);
4376 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n",
4377 ioc->name, ioc->req_sz, ioc->req_depth));
4378 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n",
4379 ioc->name, sz, sz));
4382 sz = num_chain * ioc->req_sz; /* chain buffer pool size */
4383 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n",
4384 ioc->name, ioc->req_sz, num_chain));
4385 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n",
4386 ioc->name, sz, sz, num_chain));
4389 mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma);
4392 ioc->name);
4396 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n",
4397 ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size));
4400 ioc->alloc_total += total_size;
4401 ioc->alloc = mem;
4402 ioc->alloc_dma = alloc_dma;
4403 ioc->alloc_sz = total_size;
4404 ioc->reply_frames = (MPT_FRAME_HDR *) mem;
4405 ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4407 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4408 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4415 ioc->req_frames = (MPT_FRAME_HDR *) mem;
4416 ioc->req_frames_dma = alloc_dma;
4418 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n",
4419 ioc->name, mem, (void *)(ulong)alloc_dma));
4421 ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF);
4424 for (i = 0; i < ioc->req_depth; i++) {
4425 alloc_dma += ioc->req_sz;
4426 mem += ioc->req_sz;
4429 ioc->ChainBuffer = mem;
4430 ioc->ChainBufferDMA = alloc_dma;
4432 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n",
4433 ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA));
4438 INIT_LIST_HEAD(&ioc->FreeChainQ);
4442 mem = (u8 *)ioc->ChainBuffer;
4445 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeChainQ);
4446 mem += ioc->req_sz;
4451 alloc_dma = ioc->req_frames_dma;
4452 mem = (u8 *) ioc->req_frames;
4454 spin_lock_irqsave(&ioc->FreeQlock, flags);
4455 INIT_LIST_HEAD(&ioc->FreeQ);
4456 for (i = 0; i < ioc->req_depth; i++) {
4460 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
4462 mem += ioc->req_sz;
4464 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
4466 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4467 ioc->sense_buf_pool =
4468 pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma);
4469 if (ioc->sense_buf_pool == NULL) {
4471 ioc->name);
4475 ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF);
4476 ioc->alloc_total += sz;
4477 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n",
4478 ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma));
4484 alloc_dma = ioc->alloc_dma;
4485 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n",
4486 ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma));
4488 for (i = 0; i < ioc->reply_depth; i++) {
4490 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, alloc_dma);
4491 alloc_dma += ioc->reply_sz;
4494 if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4495 ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
4496 ioc->dma_mask))
4497 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4498 "restoring 64 bit addressing\n", ioc->name));
4504 if (ioc->alloc != NULL) {
4505 sz = ioc->alloc_sz;
4506 pci_free_consistent(ioc->pcidev,
4508 ioc->alloc, ioc->alloc_dma);
4509 ioc->reply_frames = NULL;
4510 ioc->req_frames = NULL;
4511 ioc->alloc_total -= sz;
4513 if (ioc->sense_buf_pool != NULL) {
4514 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
4515 pci_free_consistent(ioc->pcidev,
4517 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
4518 ioc->sense_buf_pool = NULL;
4521 if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
4522 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
4524 d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
4525 "restoring 64 bit addressing\n", ioc->name));
4534 * @ioc: Pointer to MPT_ADAPTER structure
4550 mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req,
4560 ioc->hs_reply_idx = 0;
4561 mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4569 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4570 CHIPREG_WRITE32(&ioc->chip->Doorbell,
4577 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4580 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n",
4581 ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : ""));
4584 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
4592 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4593 if (!failcnt && (t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4610 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
4611 if ((t = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0)
4615 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req));
4616 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req);
4618 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n",
4619 ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : ""));
4624 if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0)
4627 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n",
4628 ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : ""));
4634 u16reply[ii] = ioc->hs_reply[ii];
4645 * @ioc: Pointer to MPT_ADAPTER structure
4656 WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4667 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4675 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4683 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n",
4684 ioc->name, count));
4689 ioc->name, count, intstat);
4696 * @ioc: Pointer to MPT_ADAPTER structure
4706 WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4715 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4723 intstat = CHIPREG_READ32(&ioc->chip->IntStatus);
4732 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n",
4733 ioc->name, count, howlong));
4738 ioc->name, count, intstat);
4745 * @ioc: Pointer to MPT_ADAPTER structure
4756 WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag)
4761 u16 *hs_reply = ioc->hs_reply;
4762 volatile MPIDefaultReply_t *mptReply = (MPIDefaultReply_t *) ioc->hs_reply;
4771 if ((t = WaitForDoorbellInt(ioc, howlong, sleepFlag)) < 0) {
4774 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4775 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4776 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4779 hs_reply[u16cnt++] = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4780 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4784 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n",
4785 ioc->name, t, le32_to_cpu(*(u32 *)hs_reply),
4793 if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4795 hword = le16_to_cpu(CHIPREG_READ32(&ioc->chip->Doorbell) & 0x0000FFFF);
4797 if (u16cnt < ARRAY_SIZE(ioc->hs_reply))
4799 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4802 if (!failcnt && (t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0)
4804 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
4808 ioc->name);
4812 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name));
4813 DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply);
4815 dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n",
4816 ioc->name, t, u16cnt/2));
4823 * @ioc: Pointer to MPT_ADAPTER structure
4832 GetLanConfigPages(MPT_ADAPTER *ioc)
4856 if ((rc = mpt_config(ioc, &cfg)) != 0)
4861 ppage0_alloc = (LANPage0_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page0_dma);
4868 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4871 memcpy(&ioc->lan_cnfg_page0, ppage0_alloc, copy_sz);
4875 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage0_alloc, page0_dma);
4895 if ((rc = mpt_config(ioc, &cfg)) != 0)
4903 ppage1_alloc = (LANPage1_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page1_dma);
4909 if ((rc = mpt_config(ioc, &cfg)) == 0) {
4912 memcpy(&ioc->lan_cnfg_page1, ppage1_alloc, copy_sz);
4915 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage1_alloc, page1_dma);
4926 * @ioc: Pointer to MPT_ADAPTER structure
4940 mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode)
4949 mutex_lock(&ioc->mptbase_cmds.mutex);
4952 memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
4953 INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
4972 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
4985 mpt_put_msg_frame(mpt_base_index, ioc, mf);
4986 timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done, 10*HZ);
4987 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
4990 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
4995 ioc->name, __func__, mpt_GetIocState(ioc, 0));
4996 mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP);
4997 mpt_free_msg_frame(ioc, mf);
5002 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
5008 (SasIoUnitControlReply_t *)ioc->mptbase_cmds.reply;
5019 CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
5020 mutex_unlock(&ioc->mptbase_cmds.mutex);
5027 mptbase_raid_process_event_data(MPT_ADAPTER *ioc,
5052 ioc->name, disk, volume);
5055 ioc->name, volume);
5061 ioc->name);
5067 ioc->name);
5072 ioc->name);
5077 ioc->name,
5095 ioc->name, disk);
5100 ioc->name);
5105 ioc->name);
5110 ioc->name);
5115 ioc->name,
5141 ioc->name, disk);
5146 ioc->name, pRaidEventData->ASC, pRaidEventData->ASCQ);
5151 ioc->name, disk);
5159 * @ioc: Pointer to MPT_ADAPTER structure
5168 GetIoUnitPage2(MPT_ADAPTER *ioc)
5189 if ((rc = mpt_config(ioc, &cfg)) != 0)
5198 ppage_alloc = (IOUnitPage2_t *) pci_alloc_consistent(ioc->pcidev, data_sz, &page_dma);
5205 if ((rc = mpt_config(ioc, &cfg)) == 0)
5206 ioc->biosVersion = le32_to_cpu(ppage_alloc->BiosVersion);
5208 pci_free_consistent(ioc->pcidev, data_sz, (u8 *) ppage_alloc, page_dma);
5217 * @ioc: Pointer to a Adapter Strucutre
5236 mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum)
5247 if (!ioc->spi_data.nvram) {
5255 ioc->spi_data.nvram = (int *) mem;
5257 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n",
5258 ioc->name, ioc->spi_data.nvram, sz));
5264 ioc->spi_data.nvram[ii] = MPT_HOST_NVRAM_INVALID;
5279 if (mpt_config(ioc, &cfg) != 0)
5283 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5287 if (mpt_config(ioc, &cfg) != 0) {
5288 ioc->spi_data.maxBusWidth = MPT_NARROW;
5289 ioc->spi_data.maxSyncOffset = 0;
5290 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5291 ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN;
5293 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5295 ioc->name, ioc->spi_data.minSyncFactor));
5304 ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS;
5305 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5307 ioc->name, pPP0->Capabilities));
5309 ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0;
5312 ioc->spi_data.maxSyncOffset = (u8) (data >> 16);
5314 ioc->spi_data.minSyncFactor = (u8) (data >> 8);
5315 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5317 ioc->name, ioc->spi_data.minSyncFactor));
5319 ioc->spi_data.maxSyncOffset = 0;
5320 ioc->spi_data.minSyncFactor = MPT_ASYNC;
5323 ioc->spi_data.busType = pPP0->PhysicalInterface & MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK;
5327 if ((ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD) ||
5328 (ioc->spi_data.busType == MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE)) {
5330 if (ioc->spi_data.minSyncFactor < MPT_ULTRA) {
5331 ioc->spi_data.minSyncFactor = MPT_ULTRA;
5332 ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT
5334 ioc->name, ioc->spi_data.minSyncFactor));
5339 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5355 if (mpt_config(ioc, &cfg) != 0)
5361 pbuf = pci_alloc_consistent(ioc->pcidev, header.PageLength * 4, &buf_dma);
5365 if (mpt_config(ioc, &cfg) != 0) {
5369 } else if (ioc->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
5399 ioc->spi_data.nvram[ii] = data;
5408 ioc->spi_data.bus_reset =
5417 ioc->spi_data.PortFlags = data;
5422 ioc->spi_data.nvram[ii] = data;
5426 pci_free_consistent(ioc->pcidev, header.PageLength * 4, pbuf, buf_dma);
5441 * @ioc: Pointer to a Adapter Strucutre
5448 mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum)
5465 if (mpt_config(ioc, &cfg) != 0)
5468 ioc->spi_data.sdp1version = cfg.cfghdr.hdr->PageVersion;
5469 ioc->spi_data.sdp1length = cfg.cfghdr.hdr->PageLength;
5475 if (mpt_config(ioc, &cfg) != 0)
5478 ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion;
5479 ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength;
5481 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n",
5482 ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length));
5484 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n",
5485 ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length));
5491 * @ioc : pointer to per adapter structure
5494 mpt_inactive_raid_list_free(MPT_ADAPTER *ioc)
5498 if (list_empty(&ioc->raid_data.inactive_list))
5501 mutex_lock(&ioc->raid_data.inactive_list_mutex);
5503 &ioc->raid_data.inactive_list, list) {
5507 mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5513 * @ioc : pointer to per adapter structure
5518 mpt_inactive_raid_volumes(MPT_ADAPTER *ioc, u8 channel, u8 id)
5536 if (mpt_config(ioc, &cfg) != 0)
5542 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5551 if (mpt_config(ioc, &cfg) != 0)
5566 mutex_lock(&ioc->raid_data.inactive_list_mutex);
5568 if(mpt_raid_phys_disk_pg0(ioc,
5584 &ioc->raid_data.inactive_list);
5586 mutex_unlock(&ioc->raid_data.inactive_list_mutex);
5590 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5596 * @ioc: Pointer to a Adapter Structure
5597 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5606 mpt_raid_phys_disk_pg0(MPT_ADAPTER *ioc, u8 phys_disk_num,
5625 if (mpt_config(ioc, &cfg) != 0) {
5635 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5647 if (mpt_config(ioc, &cfg) != 0) {
5659 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5667 * @ioc: Pointer to a Adapter Structure
5668 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5674 mpt_raid_phys_disk_get_num_paths(MPT_ADAPTER *ioc, u8 phys_disk_num)
5692 if (mpt_config(ioc, &cfg) != 0) {
5702 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5714 if (mpt_config(ioc, &cfg) != 0) {
5723 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5732 * @ioc: Pointer to a Adapter Structure
5733 * @phys_disk_num: io unit unique phys disk num generated by the ioc
5742 mpt_raid_phys_disk_pg1(MPT_ADAPTER *ioc, u8 phys_disk_num,
5764 if (mpt_config(ioc, &cfg) != 0) {
5774 buffer = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4,
5786 if (mpt_config(ioc, &cfg) != 0) {
5812 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, buffer,
5822 * @ioc: Pointer to a Adapter Strucutre
5830 mpt_findImVolumes(MPT_ADAPTER *ioc)
5841 if (!ioc->ir_firmware)
5846 kfree(ioc->raid_data.pIocPg2);
5847 ioc->raid_data.pIocPg2 = NULL;
5848 mpt_inactive_raid_list_free(ioc);
5862 if (mpt_config(ioc, &cfg) != 0)
5869 pIoc2 = pci_alloc_consistent(ioc->pcidev, iocpage2sz, &ioc2_dma);
5875 if (mpt_config(ioc, &cfg) != 0)
5883 ioc->raid_data.pIocPg2 = (IOCPage2_t *) mem;
5885 mpt_read_ioc_pg_3(ioc);
5888 mpt_inactive_raid_volumes(ioc,
5893 pci_free_consistent(ioc->pcidev, iocpage2sz, pIoc2, ioc2_dma);
5899 mpt_read_ioc_pg_3(MPT_ADAPTER *ioc)
5910 kfree(ioc->raid_data.pIocPg3);
5911 ioc->raid_data.pIocPg3 = NULL;
5926 if (mpt_config(ioc, &cfg) != 0)
5935 pIoc3 = pci_alloc_consistent(ioc->pcidev, iocpage3sz, &ioc3_dma);
5944 if (mpt_config(ioc, &cfg) == 0) {
5948 ioc->raid_data.pIocPg3 = (IOCPage3_t *) mem;
5952 pci_free_consistent(ioc->pcidev, iocpage3sz, pIoc3, ioc3_dma);
5958 mpt_read_ioc_pg_4(MPT_ADAPTER *ioc)
5978 if (mpt_config(ioc, &cfg) != 0)
5984 if ( (pIoc4 = ioc->spi_data.pIocPg4) == NULL ) {
5986 pIoc4 = pci_alloc_consistent(ioc->pcidev, iocpage4sz, &ioc4_dma);
5989 ioc->alloc_total += iocpage4sz;
5991 ioc4_dma = ioc->spi_data.IocPg4_dma;
5992 iocpage4sz = ioc->spi_data.IocPg4Sz;
5999 if (mpt_config(ioc, &cfg) == 0) {
6000 ioc->spi_data.pIocPg4 = (IOCPage4_t *) pIoc4;
6001 ioc->spi_data.IocPg4_dma = ioc4_dma;
6002 ioc->spi_data.IocPg4Sz = iocpage4sz;
6004 pci_free_consistent(ioc->pcidev, iocpage4sz, pIoc4, ioc4_dma);
6005 ioc->spi_data.pIocPg4 = NULL;
6006 ioc->alloc_total -= iocpage4sz;
6011 mpt_read_ioc_pg_1(MPT_ADAPTER *ioc)
6032 if (mpt_config(ioc, &cfg) != 0)
6041 pIoc1 = pci_alloc_consistent(ioc->pcidev, iocpage1sz, &ioc1_dma);
6049 if (mpt_config(ioc, &cfg) == 0) {
6055 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n",
6056 ioc->name, tmp));
6065 if (mpt_config(ioc, &cfg) == 0) {
6066 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n",
6067 ioc->name, MPT_COALESCING_TIMEOUT));
6070 if (mpt_config(ioc, &cfg) == 0) {
6071 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6073 ioc->name, MPT_COALESCING_TIMEOUT));
6075 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6077 ioc->name));
6081 dprintk(ioc, printk(MYIOC_s_WARN_FMT
6083 ioc->name));
6088 dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name));
6092 pci_free_consistent(ioc->pcidev, iocpage1sz, pIoc1, ioc1_dma);
6098 mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc)
6114 if (mpt_config(ioc, &cfg) != 0)
6121 pbuf = pci_alloc_consistent(ioc->pcidev, hdr.PageLength * 4, &buf_dma);
6127 if (mpt_config(ioc, &cfg) != 0)
6130 memcpy(ioc->board_name, pbuf->BoardName, sizeof(ioc->board_name));
6131 memcpy(ioc->board_assembly, pbuf->BoardAssembly, sizeof(ioc->board_assembly));
6132 memcpy(ioc->board_tracer, pbuf->BoardTracerNumber, sizeof(ioc->board_tracer));
6137 pci_free_consistent(ioc->pcidev, hdr.PageLength * 4, pbuf, buf_dma);
6143 * @ioc: Pointer to MPT_ADAPTER structure
6148 SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch, int sleepFlag)
6160 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6162 ioc->name, EvSwitch, &evn));
6164 return mpt_handshake_req_reply_wait(ioc, sizeof(EventNotification_t),
6172 * @ioc: Pointer to MPT_ADAPTER structure
6176 SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp)
6180 if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6181 dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n",
6182 ioc->name, __func__));
6186 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name));
6196 mpt_put_msg_frame(mpt_base_index, ioc, (MPT_FRAME_HDR *)pAck);
6204 * @ioc: Pointer to an adapter structure
6216 mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg)
6238 dcprintk(ioc, printk(MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n",
6239 ioc->name));
6244 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6245 if (ioc->ioc_reset_in_progress) {
6246 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6247 "%s: busy with host reset\n", ioc->name, __func__));
6248 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6251 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6254 if (!ioc->active ||
6255 mpt_GetIocState(ioc, 1) != MPI_IOC_STATE_OPERATIONAL) {
6256 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6257 "%s: ioc not operational, %d, %xh\n",
6258 ioc->name, __func__, ioc->active,
6259 mpt_GetIocState(ioc, 0)));
6264 mutex_lock(&ioc->mptbase_cmds.mutex);
6266 memset(ioc->mptbase_cmds.reply, 0 , MPT_DEFAULT_FRAME_SIZE);
6267 INITIALIZE_MGMT_STATUS(ioc->mptbase_cmds.status)
6271 if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) {
6272 dcprintk(ioc, printk(MYIOC_s_WARN_FMT
6273 "mpt_config: no msg frames!\n", ioc->name));
6329 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6331 ioc->name, page_type, pReq->Header.PageNumber, pReq->Action));
6333 ioc->add_sge((char *)&pReq->PageBufferSGE, flagsLength, pCfg->physAddr);
6335 mpt_put_msg_frame(mpt_base_index, ioc, mf);
6336 timeleft = wait_for_completion_timeout(&ioc->mptbase_cmds.done,
6338 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_COMMAND_GOOD)) {
6340 dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6343 ioc->name, page_type, pReq->Header.PageNumber,
6344 pReq->Action, ioc->mptbase_cmds.status, timeleft));
6345 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_DID_IOCRESET)
6352 if (!(ioc->mptbase_cmds.status & MPT_MGMT_STATUS_RF_VALID)) {
6356 pReply = (ConfigReply_t *)ioc->mptbase_cmds.reply;
6375 ioc->name, ret, timeleft);
6377 dcprintk(ioc, printk(KERN_DEBUG "IOCStatus=%04xh, IOCLogInfo=%08xh\n",
6382 CLEAR_MGMT_STATUS(ioc->mptbase_cmds.status)
6383 mutex_unlock(&ioc->mptbase_cmds.mutex);
6388 ioc->name, __func__, mpt_GetIocState(ioc, 0));
6390 if (mpt_Soft_Hard_ResetHandler(ioc, CAN_SLEEP) != 0)
6393 mpt_HardResetHandler(ioc, CAN_SLEEP);
6395 mpt_free_msg_frame(ioc, mf);
6401 " action %d\n", ioc->name, page_type,
6414 * @ioc: Pointer to the adapter structure
6420 mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase)
6424 ioc->taskmgmt_quiesce_io = 1;
6425 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6426 "%s: MPT_IOC_SETUP_RESET\n", ioc->name, __func__));
6429 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6430 "%s: MPT_IOC_PRE_RESET\n", ioc->name, __func__));
6433 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6434 "%s: MPT_IOC_POST_RESET\n", ioc->name, __func__));
6436 if (ioc->mptbase_cmds.status & MPT_MGMT_STATUS_PENDING) {
6437 ioc->mptbase_cmds.status |=
6439 complete(&ioc->mptbase_cmds.done);
6442 if (ioc->taskmgmt_cmds.status & MPT_MGMT_STATUS_PENDING) {
6443 ioc->taskmgmt_cmds.status |=
6445 complete(&ioc->taskmgmt_cmds.done);
6497 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan);
6501 MPT_ADAPTER *ioc = m->private;
6503 if (ioc) {
6504 seq_mpt_print_ioc_summary(ioc, m, 1);
6506 list_for_each_entry(ioc, &ioc_list, list) {
6507 seq_mpt_print_ioc_summary(ioc, m, 1);
6584 MPT_ADAPTER *ioc = m->private;
6589 mpt_get_fw_exp_ver(expVer, ioc);
6591 seq_printf(m, "%s:", ioc->name);
6592 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
6594 // if (ioc->facts.IOCExceptions & MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL)
6598 ioc->facts.ProductID,
6599 ioc->prod_name);
6600 seq_printf(m, " FWVersion = 0x%08x%s", ioc->facts.FWVersion.Word, expVer);
6601 if (ioc->facts.FWImageSize)
6602 seq_printf(m, " (fw_size=%d)", ioc->facts.FWImageSize);
6603 seq_printf(m, "\n MsgVersion = 0x%04x\n", ioc->facts.MsgVersion);
6604 seq_printf(m, " FirstWhoInit = 0x%02x\n", ioc->FirstWhoInit);
6605 seq_printf(m, " EventState = 0x%02x\n", ioc->facts.EventState);
6608 ioc->facts.CurrentHostMfaHighAddr);
6610 ioc->facts.CurrentSenseBufferHighAddr);
6612 seq_printf(m, " MaxChainDepth = 0x%02x frames\n", ioc->facts.MaxChainDepth);
6613 seq_printf(m, " MinBlockSize = 0x%02x bytes\n", 4*ioc->facts.BlockSize);
6616 (void *)ioc->req_frames, (void *)(ulong)ioc->req_frames_dma);
6620 sz = (ioc->req_sz * ioc->req_depth) + 128;
6623 ioc->req_sz, ioc->req_depth, ioc->req_sz*ioc->req_depth, sz);
6625 4*ioc->facts.RequestFrameSize,
6626 ioc->facts.GlobalCredits);
6629 (void *)ioc->alloc, (void *)(ulong)ioc->alloc_dma);
6630 sz = (ioc->reply_sz * ioc->reply_depth) + 128;
6632 ioc->reply_sz, ioc->reply_depth, ioc->reply_sz*ioc->reply_depth, sz);
6634 ioc->facts.CurReplyFrameSize,
6635 ioc->facts.ReplyQueueDepth);
6638 (ioc->facts.MaxDevices==0) ? 255 : ioc->facts.MaxDevices);
6639 seq_printf(m, " MaxBuses = %d\n", ioc->facts.MaxBuses);
6642 for (p=0; p < ioc->facts.NumberOfPorts; p++) {
6645 ioc->facts.NumberOfPorts);
6646 if (ioc->bus_type == FC) {
6647 if (ioc->pfacts[p].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
6648 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6653 ioc->fc_port_page0[p].WWNN.High,
6654 ioc->fc_port_page0[p].WWNN.Low,
6655 ioc->fc_port_page0[p].WWPN.High,
6656 ioc->fc_port_page0[p].WWPN.Low);
6679 mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc)
6682 if ((ioc->facts.FWVersion.Word >> 24) == 0x0E) {
6684 (ioc->facts.FWVersion.Word >> 16) & 0x00FF, /* Month */
6685 (ioc->facts.FWVersion.Word >> 8) & 0x1F); /* Day */
6688 if ((ioc->facts.FWVersion.Word >> 8) & 0x80)
6696 * @ioc: Pointer to MPT_ADAPTER structure
6706 mpt_print_ioc_summary(MPT_ADAPTER *ioc, char *buffer, int *size, int len, int showlan)
6711 mpt_get_fw_exp_ver(expVer, ioc);
6714 * Shorter summary of attached ioc's...
6717 ioc->name,
6718 ioc->prod_name,
6720 ioc->facts.FWVersion.Word,
6722 ioc->facts.NumberOfPorts,
6723 ioc->req_depth);
6725 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6726 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6731 y += sprintf(buffer+len+y, ", IRQ=%d", ioc->pci_irq);
6733 if (!ioc->active)
6741 static void seq_mpt_print_ioc_summary(MPT_ADAPTER *ioc, struct seq_file *m, int showlan)
6745 mpt_get_fw_exp_ver(expVer, ioc);
6748 * Shorter summary of attached ioc's...
6751 ioc->name,
6752 ioc->prod_name,
6754 ioc->facts.FWVersion.Word,
6756 ioc->facts.NumberOfPorts,
6757 ioc->req_depth);
6759 if (showlan && (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN)) {
6760 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
6765 seq_printf(m, ", IRQ=%d", ioc->pci_irq);
6767 if (!ioc->active)
6775 * @ioc: Pointer to MPT_ADAPTER structure
6782 mpt_set_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6787 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6788 if (ioc->ioc_reset_in_progress || ioc->taskmgmt_in_progress ||
6789 (ioc->alt_ioc && ioc->alt_ioc->taskmgmt_in_progress)) {
6794 ioc->taskmgmt_in_progress = 1;
6795 ioc->taskmgmt_quiesce_io = 1;
6796 if (ioc->alt_ioc) {
6797 ioc->alt_ioc->taskmgmt_in_progress = 1;
6798 ioc->alt_ioc->taskmgmt_quiesce_io = 1;
6801 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6808 * @ioc: Pointer to MPT_ADAPTER structure
6812 mpt_clear_taskmgmt_in_progress_flag(MPT_ADAPTER *ioc)
6816 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6817 ioc->taskmgmt_in_progress = 0;
6818 ioc->taskmgmt_quiesce_io = 0;
6819 if (ioc->alt_ioc) {
6820 ioc->alt_ioc->taskmgmt_in_progress = 0;
6821 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
6823 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6831 * @ioc: Pointer to MPT_ADAPTER structure
6835 mpt_halt_firmware(MPT_ADAPTER *ioc)
6839 ioc_raw_state = mpt_GetIocState(ioc, 0);
6843 ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
6844 panic("%s: IOC Fault (%04xh)!!!\n", ioc->name,
6847 CHIPREG_WRITE32(&ioc->chip->Doorbell, 0xC0FFEE00);
6849 ioc->name);
6856 * @ioc: Pointer to MPT_ADAPTER structure
6868 mpt_SoftResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
6877 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SoftResetHandler Entered!\n",
6878 ioc->name));
6880 ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
6883 mpt_halt_firmware(ioc);
6887 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6888 "skipping, either in FAULT or RESET state!\n", ioc->name));
6892 if (ioc->bus_type == FC) {
6893 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6894 "skipping, because the bus type is FC!\n", ioc->name));
6898 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6899 if (ioc->ioc_reset_in_progress) {
6900 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6903 ioc->ioc_reset_in_progress = 1;
6904 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6910 mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
6913 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6914 if (ioc->taskmgmt_in_progress) {
6915 ioc->ioc_reset_in_progress = 0;
6916 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6919 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6921 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
6922 ioc->active = 0;
6925 rc = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
6929 mpt_signal_reset(cb_idx, ioc, MPT_IOC_PRE_RESET);
6935 ioc_state = mpt_GetIocState(ioc, 0) & MPI_IOC_STATE_MASK;
6941 rc = GetIocFacts(ioc, sleepFlag,
6953 rc = PrimeIocFifos(ioc);
6957 rc = SendIocInit(ioc, sleepFlag);
6961 rc = SendEventNotification(ioc, 1, sleepFlag);
6965 if (ioc->hard_resets < -1)
6966 ioc->hard_resets++;
6972 ioc->active = 1;
6973 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
6976 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
6977 ioc->ioc_reset_in_progress = 0;
6978 ioc->taskmgmt_quiesce_io = 0;
6979 ioc->taskmgmt_in_progress = 0;
6980 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
6982 if (ioc->active) { /* otherwise, hard reset coming */
6985 mpt_signal_reset(cb_idx, ioc,
6990 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT
6992 ioc->name, jiffies_to_msecs(jiffies - time_count)/1000,
7000 * @ioc: Pointer to MPT_ADAPTER structure
7008 mpt_Soft_Hard_ResetHandler(MPT_ADAPTER *ioc, int sleepFlag) {
7011 ret = mpt_SoftResetHandler(ioc, sleepFlag);
7014 ret = mpt_HardResetHandler(ioc, sleepFlag);
7026 * @ioc: Pointer to MPT_ADAPTER structure
7041 mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag)
7048 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name));
7050 printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name);
7051 printk("MF count 0x%x !\n", ioc->mfcnt);
7054 mpt_halt_firmware(ioc);
7059 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7060 if (ioc->ioc_reset_in_progress) {
7061 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7064 ioc->ioc_reset_in_progress = 1;
7065 if (ioc->alt_ioc)
7066 ioc->alt_ioc->ioc_reset_in_progress = 1;
7067 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7077 mpt_signal_reset(cb_idx, ioc, MPT_IOC_SETUP_RESET);
7078 if (ioc->alt_ioc)
7079 mpt_signal_reset(cb_idx, ioc->alt_ioc,
7085 rc = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_RECOVER, sleepFlag);
7089 rc, ioc->name, mpt_GetIocState(ioc, 0));
7091 if (ioc->hard_resets < -1)
7092 ioc->hard_resets++;
7095 spin_lock_irqsave(&ioc->taskmgmt_lock, flags);
7096 ioc->ioc_reset_in_progress = 0;
7097 ioc->taskmgmt_quiesce_io = 0;
7098 ioc->taskmgmt_in_progress = 0;
7099 if (ioc->alt_ioc) {
7100 ioc->alt_ioc->ioc_reset_in_progress = 0;
7101 ioc->alt_ioc->taskmgmt_quiesce_io = 0;
7102 ioc->alt_ioc->taskmgmt_in_progress = 0;
7104 spin_unlock_irqrestore(&ioc->taskmgmt_lock, flags);
7108 mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
7109 if (ioc->alt_ioc)
7111 ioc->alt_ioc, MPT_IOC_POST_RESET);
7115 dtmprintk(ioc,
7117 "HardResetHandler: completed (%d seconds): %s\n", ioc->name,
7126 mpt_display_event_info(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply)
7132 char *evStr = ioc->evStr;
7553 devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7555 ioc->name, event, evStr));
7557 devtverboseprintk(ioc, printk(KERN_DEBUG MYNAM
7560 devtverboseprintk(ioc, printk(" %08x",
7562 devtverboseprintk(ioc, printk(KERN_DEBUG "\n"));
7568 * @ioc: Pointer to MPT_ADAPTER structure
7577 ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply, int *evHandlers)
7598 mpt_display_event_info(ioc, pEventReply);
7612 if (ioc->facts.Function) {
7613 ioc->facts.EventState = evState;
7618 mptbase_raid_process_event_data(ioc,
7629 if (ioc->events && (ioc->eventTypes & ( 1 << event))) {
7632 idx = ioc->eventContext % MPTCTL_EVENT_LOG_SIZE;
7634 ioc->events[idx].event = event;
7635 ioc->events[idx].eventContext = ioc->eventContext;
7639 ioc->events[idx].data[ii] = le32_to_cpu(pEventReply->Data[ii]);
7641 ioc->events[idx].data[ii] = 0;
7644 ioc->eventContext++;
7653 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7655 ioc->name, cb_idx));
7656 r += (*(MptEvHandlers[cb_idx]))(ioc, pEventReply);
7665 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT
7666 "EventAck required\n",ioc->name));
7667 if ((ii = SendEventAck(ioc, pEventReply)) != 0) {
7668 devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n",
7669 ioc->name, ii));
7680 * @ioc: Pointer to MPT_ADAPTER structure
7686 mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info)
7718 ioc->name, log_info, desc, (log_info & 0xFFFFFF));
7724 * @ioc: Pointer to MPT_ADAPTER structure
7730 mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info)
7786 printk(MYIOC_s_INFO_FMT "LogInfo(0x%08x): F/W: %s\n", ioc->name, log_info, desc);
7935 * @ioc: Pointer to MPT_ADAPTER structure
7942 mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info, u8 cb_idx)
7997 ioc->name, log_info, originator_desc, code_desc,
8003 ioc->name, log_info, originator_desc, code_desc,
8009 ioc->name, log_info, originator_desc,
8017 * @ioc: Pointer to MPT_ADAPTER structure
8024 mpt_iocstatus_info_config(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8089 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s: %s\n",
8090 ioc->name, ioc_status, desc, extend_desc));
8095 * @ioc: Pointer to MPT_ADAPTER structure
8102 mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf)
8155 mpt_iocstatus_info_config(ioc, status, mf);
8316 dreplyprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOCStatus(0x%04X): %s\n",
8317 ioc->name, status, desc));