Lines Matching refs:atbm8830_write_reg
39 static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
100 return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
113 atbm8830_write_reg(priv, REG_OSC_CLK, val);
114 atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
115 atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
136 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
137 atbm8830_write_reg(priv, REG_IF_FREQ, val);
138 atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
139 atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
143 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
146 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
151 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
154 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
156 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
180 atbm8830_write_reg(priv, REG_AGC_MIN, min);
181 atbm8830_write_reg(priv, REG_AGC_MAX, max);
182 atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
192 atbm8830_write_reg(priv, 0x099B + i, 0x08);
194 atbm8830_write_reg(priv, 0x095B, 0x7F);
195 atbm8830_write_reg(priv, 0x09CB, 0x01);
196 atbm8830_write_reg(priv, 0x09CC, 0x7F);
197 atbm8830_write_reg(priv, 0x09CD, 0x7F);
198 atbm8830_write_reg(priv, 0x0E01, 0x20);
201 atbm8830_write_reg(priv, 0x0B03, 0x0A);
202 atbm8830_write_reg(priv, 0x0935, 0x10);
203 atbm8830_write_reg(priv, 0x0936, 0x08);
204 atbm8830_write_reg(priv, 0x093E, 0x08);
205 atbm8830_write_reg(priv, 0x096E, 0x06);
208 atbm8830_write_reg(priv, 0x0B09, 0x00);
210 atbm8830_write_reg(priv, 0x0B0A, 0x08);
220 atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
221 atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
223 atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
226 atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
252 atbm8830_write_reg(priv, 0x000A, 0);
255 atbm8830_write_reg(priv, 0x020C, 11);
258 atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
430 return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);