Lines Matching refs:asus
80 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset));
86 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset, value);
92 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
98 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
104 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80));
110 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80, value);
116 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
122 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
128 return (readreg(cs->hw.asus.adr,
129 cs->hw.asus.hscx, offset + (hscx ? 0x40 : 0)));
135 writereg(cs->hw.asus.adr,
136 cs->hw.asus.hscx, offset + (hscx ? 0x40 : 0), value);
143 #define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \
144 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0))
145 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.asus.adr, \
146 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0), data)
148 #define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.asus.adr, \
149 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
151 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.asus.adr, \
152 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
164 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
168 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA);
172 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
178 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA);
184 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0xFF);
185 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0xFF);
186 writereg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_MASK, 0xFF);
187 writereg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_MASK, 0x0);
188 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK, 0x0);
189 writereg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0x0);
202 ista = readreg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ISTA);
207 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
218 val = 0xfe & readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA | 0x80);
227 ista = readreg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ISTA);
234 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_MASK, 0xFF);
235 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_MASK, 0xC0);
245 if (cs->hw.asus.cfg_reg)
246 release_region(cs->hw.asus.cfg_reg, bytecnt);
253 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_POTA2, 0x20);
255 byteout(cs->hw.asus.adr, ASUS_RESET); /* Reset On */
258 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_POTA2, 0x0);
260 byteout(cs->hw.asus.adr, 0); /* Reset Off */
263 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_CONF, 0x0);
264 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ACFG, 0xff);
265 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_AOE, 0x0);
266 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_MASK, 0xc0);
267 writereg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_PCFG, 0x12);
373 cs->hw.asus.cfg_reg = card->para[1];
375 if (!request_region(cs->hw.asus.cfg_reg, bytecnt, "asuscom isdn")) {
378 cs->hw.asus.cfg_reg,
379 cs->hw.asus.cfg_reg + bytecnt);
383 cs->hw.asus.cfg_reg, cs->irq);
389 val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE,
390 cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID);
393 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_IPAC_ALE;
394 cs->hw.asus.isac = cs->hw.asus.cfg_reg + ASUS_IPAC_DATA;
395 cs->hw.asus.hscx = cs->hw.asus.cfg_reg + ASUS_IPAC_DATA;
405 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_ADR;
406 cs->hw.asus.isac = cs->hw.asus.cfg_reg + ASUS_ISAC;
407 cs->hw.asus.hscx = cs->hw.asus.cfg_reg + ASUS_HSCX;
408 cs->hw.asus.u7 = cs->hw.asus.cfg_reg + ASUS_CTRL_U7;
409 cs->hw.asus.pots = cs->hw.asus.cfg_reg + ASUS_CTRL_POTS;