• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/char/ip2/

Lines Matching refs:pB

72 // Function:   iiSetAddress(pB, address, delay)
73 // Parameters: pB - pointer to the board structure
79 // False if there is any error: the pB->i2eError field has the error
89 iiSetAddress( i2eBordStrPtr pB, int address, delayFunc_t delay )
92 pB->i2eValid = I2E_INCOMPLETE;
102 I2_COMPLETE(pB, I2EE_BADADDR);
106 pB->i2eBase = address;
107 pB->i2eData = address + FIFO_DATA;
108 pB->i2eStatus = address + FIFO_STATUS;
109 pB->i2ePointer = address + FIFO_PTR;
110 pB->i2eXMail = address + FIFO_MAIL;
111 pB->i2eXMask = address + FIFO_MASK;
117 pB->i2eDelay = ((delay != (delayFunc_t)NULL) ? delay : (delayFunc_t)ii2Nop);
119 pB->i2eValid = I2E_MAGIC;
120 pB->i2eState = II_STATE_COLD;
122 I2_COMPLETE(pB, I2EE_GOOD);
126 // Function: iiReset(pB)
127 // Parameters: pB - pointer to the board structure
130 // False if there is any error: the pB->i2eError field has the error
142 iiReset(i2eBordStrPtr pB)
145 if (pB->i2eValid != I2E_MAGIC)
147 I2_COMPLETE(pB, I2EE_BADMAGIC);
150 outb(0, pB->i2eBase + FIFO_RESET); /* Any data will do */
151 iiDelay(pB, 50); // Pause between resets
152 outb(0, pB->i2eBase + FIFO_RESET); /* Second reset */
165 pB->i2eState = II_STATE_RESET;
173 pB->i2eUsingIrq = I2_IRQ_UNDEFINED; /* to not use an interrupt so far */
174 pB->i2eWaitingForEmptyFifo = 0;
175 pB->i2eOutMailWaiting = 0;
176 pB->i2eChannelPtr = NULL;
177 pB->i2eChannelCnt = 0;
179 pB->i2eLeadoffWord[0] = 0;
180 pB->i2eFifoInInts = 0;
181 pB->i2eFifoOutInts = 0;
182 pB->i2eFatalTrap = NULL;
183 pB->i2eFatal = 0;
185 I2_COMPLETE(pB, I2EE_GOOD);
189 // Function: iiResetDelay(pB)
190 // Parameters: pB - pointer to the board structure
193 // False if there is any error: the pB->i2eError field has the error
202 iiResetDelay(i2eBordStrPtr pB)
204 if (pB->i2eValid != I2E_MAGIC) {
205 I2_COMPLETE(pB, I2EE_BADMAGIC);
207 if (pB->i2eState != II_STATE_RESET) {
208 I2_COMPLETE(pB, I2EE_BADSTATE);
210 iiDelay(pB,2000); /* Now we wait for two seconds. */
212 I2_COMPLETE(pB, I2EE_GOOD);
216 // Function: iiInitialize(pB)
217 // Parameters: pB - pointer to the board structure
220 // False if there is any error: the pB->i2eError field has the error
225 // in the pB structure.
234 iiInitialize(i2eBordStrPtr pB)
241 if (pB->i2eValid != I2E_MAGIC)
243 I2_COMPLETE(pB, I2EE_BADMAGIC);
246 if (pB->i2eState != II_STATE_RESET || !iiDelayed)
248 I2_COMPLETE(pB, I2EE_BADSTATE);
253 pB->i2eValid = I2E_INCOMPLETE;
261 if (!I2_HAS_INPUT(pB)) {
262 pB->i2ePomSize = itemp;
263 I2_COMPLETE(pB, I2EE_PORM_SHORT);
266 pB->i2ePom.c[itemp] = c = inb(pB->i2eData);
274 pB->i2ePomSize = itemp+1;
275 I2_COMPLETE(pB, I2EE_BADMAGIC);
279 pB->i2ePomSize = itemp;
282 if (I2_HAS_INPUT(pB))
283 I2_COMPLETE(pB, I2EE_PORM_LONG);
288 if (pB->i2ePom.e.porDiag1 & POR_BAD_MAPPER)
290 I2_COMPLETE(pB, I2EE_POSTERR);
295 switch (pB->i2ePom.e.porID & POR_ID_FAMILY)
299 pB->i2eFifoStyle = FIFO_II;
300 pB->i2eFifoSize = 512; // 512 bytes, always
301 pB->i2eDataWidth16 = false;
303 pB->i2eMaxIrq = 15; // Because board cannot tell us it is in an 8-bit
306 pB->i2eGoodMap[1] =
307 pB->i2eGoodMap[2] =
308 pB->i2eGoodMap[3] =
309 pB->i2eChannelMap[1] =
310 pB->i2eChannelMap[2] =
311 pB->i2eChannelMap[3] = 0;
313 switch (pB->i2ePom.e.porID & POR_ID_SIZE)
316 pB->i2eGoodMap[0] =
317 pB->i2eChannelMap[0] = 0x0f; // four-port
321 if (pB->i2ePom.e.porPorts1 != 4)
323 I2_COMPLETE(pB, I2EE_INCONSIST);
329 pB->i2eGoodMap[0] =
330 pB->i2eChannelMap[0] = 0xff; // Eight port
331 if (pB->i2ePom.e.porPorts1 != 8)
333 I2_COMPLETE(pB, I2EE_INCONSIST);
338 pB->i2eGoodMap[0] =
339 pB->i2eChannelMap[0] = 0x3f; // Six Port
340 if (pB->i2ePom.e.porPorts1 != 6)
342 I2_COMPLETE(pB, I2EE_INCONSIST);
348 if (pB->i2ePom.e.porDiag1 & POR_BAD_UART1)
350 pB->i2eGoodMap[0] &= ~0x0f;
353 if (pB->i2ePom.e.porDiag1 & POR_BAD_UART2)
355 pB->i2eGoodMap[0] &= ~0xf0;
362 pB->i2eFifoStyle = FIFO_IIEX;
364 itemp = pB->i2ePom.e.porFifoSize;
371 I2_COMPLETE(pB, I2EE_INCONSIST);
373 pB->i2eFifoSize = (1 << itemp);
377 ilimit = pB->i2ePom.e.porNumBoxes;
387 utemp = pB->i2ePom.e.porFlags;
390 pB->i2eChannelMap[0] = 0x000f;
395 pB->i2eChannelMap[itemp] =
403 utemp = (pB->i2ePom.e.porPorts2 << 8) + pB->i2ePom.e.porPorts1;
407 pB->i2eGoodMap[itemp] = 0;
408 if (utemp & 1) pB->i2eGoodMap[itemp] |= 0x000f;
409 if (utemp & 2) pB->i2eGoodMap[itemp] |= 0x00f0;
410 if (utemp & 4) pB->i2eGoodMap[itemp] |= 0x0f00;
411 if (utemp & 8) pB->i2eGoodMap[itemp] |= 0xf000;
416 switch (pB->i2ePom.e.porBus & (POR_BUS_SLOT16 | POR_BUS_DIP16) )
419 pB->i2eDataWidth16 = true;
420 pB->i2eMaxIrq = 15;
424 pB->i2eDataWidth16 = false;
425 pB->i2eMaxIrq = 15;
431 pB->i2eDataWidth16 = false;
432 pB->i2eMaxIrq = 7;
438 I2_COMPLETE(pB, I2EE_BAD_FAMILY);
444 pB->i2eFifoRemains = 0;
448 switch (pB->i2ePom.e.porBus & POR_BUS_TYPE)
456 I2_COMPLETE(pB, I2EE_BADBUS);
459 if (pB->i2eDataWidth16)
461 pB->i2eWriteBuf = iiWriteBuf16;
462 pB->i2eReadBuf = iiReadBuf16;
463 pB->i2eWriteWord = iiWriteWord16;
464 pB->i2eReadWord = iiReadWord16;
466 pB->i2eWriteBuf = iiWriteBuf8;
467 pB->i2eReadBuf = iiReadBuf8;
468 pB->i2eWriteWord = iiWriteWord8;
469 pB->i2eReadWord = iiReadWord8;
472 switch(pB->i2eFifoStyle)
475 pB->i2eWaitForTxEmpty = iiWaitForTxEmptyII;
476 pB->i2eTxMailEmpty = iiTxMailEmptyII;
477 pB->i2eTrySendMail = iiTrySendMailII;
478 pB->i2eGetMail = iiGetMailII;
479 pB->i2eEnableMailIrq = iiEnableMailIrqII;
480 pB->i2eWriteMask = iiWriteMaskII;
485 pB->i2eWaitForTxEmpty = iiWaitForTxEmptyIIEX;
486 pB->i2eTxMailEmpty = iiTxMailEmptyIIEX;
487 pB->i2eTrySendMail = iiTrySendMailIIEX;
488 pB->i2eGetMail = iiGetMailIIEX;
489 pB->i2eEnableMailIrq = iiEnableMailIrqIIEX;
490 pB->i2eWriteMask = iiWriteMaskIIEX;
495 I2_COMPLETE(pB, I2EE_INCONSIST);
499 pB->i2eState = II_STATE_READY; // Ready to load loadware.
507 pB->i2eStartMail = iiGetMail(pB);
510 pB->i2eStartMail = NO_MAIL_HERE;
514 pB->i2eValid = I2E_MAGIC;
515 I2_COMPLETE(pB, I2EE_GOOD);
567 // Function: iiWriteBuf16(pB, address, count)
568 // Parameters: pB - pointer to board structure
573 // False if there is any error: the pB->i2eError field has the error
578 // structure pointer pB. Should count happen to be odd, an extra pad byte is
580 // indirectly through pB->i2eWriteBuf.
584 iiWriteBuf16(i2eBordStrPtr pB, unsigned char *address, int count)
587 if (pB->i2eValid != I2E_MAGIC)
588 I2_COMPLETE(pB, I2EE_INVALID);
590 I2_OUTSW(pB->i2eData, address, count);
592 I2_COMPLETE(pB, I2EE_GOOD);
596 // Function: iiWriteBuf8(pB, address, count)
597 // Parameters: pB - pointer to board structure
602 // False if there is any error: the pB->i2eError field has the error
607 // structure pointer pB. Should count happen to be odd, an extra pad byte is
609 // Uses 8-bit (byte) operations. Is called indirectly through pB->i2eWriteBuf.
613 iiWriteBuf8(i2eBordStrPtr pB, unsigned char *address, int count)
616 if (pB->i2eValid != I2E_MAGIC)
617 I2_COMPLETE(pB, I2EE_INVALID);
619 I2_OUTSB(pB->i2eData, address, count);
621 I2_COMPLETE(pB, I2EE_GOOD);
625 // Function: iiReadBuf16(pB, address, count)
626 // Parameters: pB - pointer to board structure
631 // False if there is any error: the pB->i2eError field has the error
636 // structure pointer pB. Should count happen to be odd, an extra pad byte is
638 // indirectly through pB->i2eReadBuf.
642 iiReadBuf16(i2eBordStrPtr pB, unsigned char *address, int count)
645 if (pB->i2eValid != I2E_MAGIC)
646 I2_COMPLETE(pB, I2EE_INVALID);
648 I2_INSW(pB->i2eData, address, count);
650 I2_COMPLETE(pB, I2EE_GOOD);
654 // Function: iiReadBuf8(pB, address, count)
655 // Parameters: pB - pointer to board structure
660 // False if there is any error: the pB->i2eError field has the error
665 // structure pointer pB. Should count happen to be odd, an extra pad byte is
667 // 8-bit (byte) operations. Is called indirectly through pB->i2eReadBuf.
671 iiReadBuf8(i2eBordStrPtr pB, unsigned char *address, int count)
674 if (pB->i2eValid != I2E_MAGIC)
675 I2_COMPLETE(pB, I2EE_INVALID);
677 I2_INSB(pB->i2eData, address, count);
679 I2_COMPLETE(pB, I2EE_GOOD);
683 // Function: iiReadWord16(pB)
684 // Parameters: pB - pointer to board structure
687 // False if there is any error: the pB->i2eError field has the error
692 // pointer pB. Uses a 16-bit operation. Is called indirectly through
693 // pB->i2eReadWord.
697 iiReadWord16(i2eBordStrPtr pB)
699 return inw(pB->i2eData);
703 // Function: iiReadWord8(pB)
704 // Parameters: pB - pointer to board structure
707 // False if there is any error: the pB->i2eError field has the error
712 // pointer pB. Uses two 8-bit operations. Bytes are assumed to be LSB first. Is
713 // called indirectly through pB->i2eReadWord.
717 iiReadWord8(i2eBordStrPtr pB)
721 urs = inb(pB->i2eData);
723 return (inb(pB->i2eData) << 8) | urs;
727 // Function: iiWriteWord16(pB, value)
728 // Parameters: pB - pointer to board structure
732 // False if there is any error: the pB->i2eError field has the error
737 // pointer pB. Uses 16-bit operation. Is called indirectly through
738 // pB->i2eWriteWord.
742 iiWriteWord16(i2eBordStrPtr pB, unsigned short value)
744 outw((int)value, pB->i2eData);
748 // Function: iiWriteWord8(pB, value)
749 // Parameters: pB - pointer to board structure
753 // False if there is any error: the pB->i2eError field has the error
758 // pointer pB. Uses two 8-bit operations (writes LSB first). Is called
759 // indirectly through pB->i2eWriteWord.
763 iiWriteWord8(i2eBordStrPtr pB, unsigned short value)
765 outb((char)value, pB->i2eData);
766 outb((char)(value >> 8), pB->i2eData);
770 // Function: iiWaitForTxEmptyII(pB, mSdelay)
771 // Parameters: pB - pointer to board structure
775 // False if it not empty in the required time: the pB->i2eError
781 // not empty by the required time, returns false and error in pB->i2eError,
790 // pB->i2eWaitForTxEmpty.
794 iiWaitForTxEmptyII(i2eBordStrPtr pB, int mSdelay)
819 outb(SEL_COMMAND, pB->i2ePointer);
820 outb(SEL_CMD_SH, pB->i2ePointer);
822 itemp = inb(pB->i2eStatus);
824 outb(SEL_COMMAND, pB->i2ePointer);
825 outb(SEL_CMD_UNSH, pB->i2ePointer);
829 I2_UPDATE_FIFO_ROOM(pB);
831 I2_COMPLETE(pB, I2EE_GOOD);
839 iiDelay(pB, 1); /* 1 mS granularity on checking condition */
841 I2_COMPLETE(pB, I2EE_TXE_TIME);
845 // Function: iiWaitForTxEmptyIIEX(pB, mSdelay)
846 // Parameters: pB - pointer to board structure
850 // False if it not empty in the required time: the pB->i2eError
856 // not empty by the required time, returns false and error in pB->i2eError,
865 // pB->i2eWaitForTxEmpty.
869 iiWaitForTxEmptyIIEX(i2eBordStrPtr pB, int mSdelay)
883 if (inb(pB->i2eStatus) & STE_OUT_MT) {
884 I2_UPDATE_FIFO_ROOM(pB);
886 I2_COMPLETE(pB, I2EE_GOOD);
893 iiDelay(pB, 1); // 1 mS granularity on checking condition
895 I2_COMPLETE(pB, I2EE_TXE_TIME);
899 // Function: iiTxMailEmptyII(pB)
900 // Parameters: pB - pointer to board structure
914 iiTxMailEmptyII(i2eBordStrPtr pB)
916 int port = pB->i2ePointer;
922 // Function: iiTxMailEmptyIIEX(pB)
923 // Parameters: pB - pointer to board structure
937 iiTxMailEmptyIIEX(i2eBordStrPtr pB)
939 return !(inb(pB->i2eStatus) & STE_OUT_MAIL);
943 // Function: iiTrySendMailII(pB,mail)
944 // Parameters: pB - pointer to board structure
959 iiTrySendMailII(i2eBordStrPtr pB, unsigned char mail)
961 int port = pB->i2ePointer;
973 // Function: iiTrySendMailIIEX(pB,mail)
974 // Parameters: pB - pointer to board structure
989 iiTrySendMailIIEX(i2eBordStrPtr pB, unsigned char mail)
991 if (inb(pB->i2eStatus) & STE_OUT_MAIL)
993 outb(mail, pB->i2eXMail);
998 // Function: iiGetMailII(pB,mail)
999 // Parameters: pB - pointer to board structure
1012 iiGetMailII(i2eBordStrPtr pB)
1014 if (I2_HAS_MAIL(pB)) {
1015 outb(SEL_INMAIL, pB->i2ePointer);
1016 return inb(pB->i2ePointer);
1023 // Function: iiGetMailIIEX(pB,mail)
1024 // Parameters: pB - pointer to board structure
1037 iiGetMailIIEX(i2eBordStrPtr pB)
1039 if (I2_HAS_MAIL(pB))
1040 return inb(pB->i2eXMail);
1046 // Function: iiEnableMailIrqII(pB)
1047 // Parameters: pB - pointer to board structure
1059 iiEnableMailIrqII(i2eBordStrPtr pB)
1061 outb(SEL_MASK, pB->i2ePointer);
1062 outb(ST_IN_MAIL, pB->i2ePointer);
1066 // Function: iiEnableMailIrqIIEX(pB)
1067 // Parameters: pB - pointer to board structure
1079 iiEnableMailIrqIIEX(i2eBordStrPtr pB)
1081 outb(MX_IN_MAIL, pB->i2eXMask);
1085 // Function: iiWriteMaskII(pB)
1086 // Parameters: pB - pointer to board structure
1098 iiWriteMaskII(i2eBordStrPtr pB, unsigned char value)
1100 outb(SEL_MASK, pB->i2ePointer);
1101 outb(value, pB->i2ePointer);
1105 // Function: iiWriteMaskIIEX(pB)
1106 // Parameters: pB - pointer to board structure
1118 iiWriteMaskIIEX(i2eBordStrPtr pB, unsigned char value)
1120 outb(value, pB->i2eXMask);
1124 // Function: iiDownloadBlock(pB, pSource, isStandard)
1125 // Parameters: pB - pointer to board structure
1133 // Downloads a single block (at pSource)to the board referenced by pB. Caller
1154 iiDownloadBlock ( i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard)
1159 if (pB->i2eValid != I2E_MAGIC) return II_DOWN_BADVALID;
1161 switch(pB->i2eState)
1173 pB->i2eToLoad = 1 + pSource->e.loadBlocksMore;
1178 pB->i2eState = II_STATE_LOADING;
1179 pB->i2eLVersion = pSource->e.loadVersion;
1180 pB->i2eLRevision = pSource->e.loadRevision;
1181 pB->i2eLSub = pSource->e.loadSubRevision;
1199 if (!iiWaitForTxEmpty(pB, MAX_DLOAD_READ_TIME)) {
1203 if (!iiWriteBuf(pB, pSource->c, LOADWARE_BLOCK_SIZE)) {
1212 if (!iiWaitForTxEmpty(pB, MAX_DLOAD_START_TIME)) {
1218 if (--(pB->i2eToLoad)) {
1224 if (!iiWaitForTxEmpty(pB, MAX_DLOAD_READ_TIME)) {
1231 if (I2_HAS_INPUT(pB)) {
1232 switch (inb(pB->i2eData)) {
1234 pB->i2eState =
1242 if (pB->i2ePom.e.porDiag2 & POR_DEBUG_PORT) {
1243 iiDelay(pB, 700);
1254 iiDelay(pB, 10); // 10 mS granularity on checking condition
1259 pB->i2eState = II_STATE_BADLOAD;
1264 // Function: iiDownloadAll(pB, pSource, isStandard, size)
1265 // Parameters: pB - pointer to board structure
1283 iiDownloadAll(i2eBordStrPtr pB, loadHdrStrPtr pSource, int isStandard, int size)
1289 if (pB->i2eState != II_STATE_READY) return II_DOWN_BADSTATE;
1297 status = iiDownloadBlock(pB, pSource++, isStandard);