Lines Matching defs:lanai
0 /* lanai.c -- Copyright 1999-2003 by Mitchell Blank Jr <mitch@sfgoth.com>
164 #define DEV_LABEL "lanai"
306 static void vci_bitfield_iterate(struct lanai_dev *lanai,
313 func(lanai, vci);
337 if (bytes > (128 * 1024)) /* max lanai buffer size */
346 * everything, but the way the lanai uses DMA memory would
442 #define CONFIG1_GPOUT3 (0x00004000) /* Loopback lanai */
471 static inline bus_addr_t reg_addr(const struct lanai_dev *lanai,
474 return lanai->base + reg;
477 static inline u32 reg_read(const struct lanai_dev *lanai,
481 t = readl(reg_addr(lanai, reg));
482 RWDEBUG("R [0x%08X] 0x%02X = 0x%08X\n", (unsigned int) lanai->base,
487 static inline void reg_write(const struct lanai_dev *lanai, u32 val,
490 RWDEBUG("W [0x%08X] 0x%02X < 0x%08X\n", (unsigned int) lanai->base,
492 writel(val, reg_addr(lanai, reg));
495 static inline void conf1_write(const struct lanai_dev *lanai)
497 reg_write(lanai, lanai->conf1, Config1_Reg);
500 static inline void conf2_write(const struct lanai_dev *lanai)
502 reg_write(lanai, lanai->conf2, Config2_Reg);
506 static inline void conf2_write_if_powerup(const struct lanai_dev *lanai)
509 if (unlikely((lanai->conf1 & CONFIG1_POWERDOWN) != 0))
512 conf2_write(lanai);
515 static inline void reset_board(const struct lanai_dev *lanai)
518 reg_write(lanai, 0, Reset_Reg);
538 static inline bus_addr_t sram_addr(const struct lanai_dev *lanai, int offset)
540 return lanai->base + SRAM_START + offset;
543 static inline u32 sram_read(const struct lanai_dev *lanai, int offset)
545 return readl(sram_addr(lanai, offset));
548 static inline void sram_write(const struct lanai_dev *lanai,
551 writel(val, sram_addr(lanai, offset));
554 static int __devinit sram_test_word(const struct lanai_dev *lanai,
558 sram_write(lanai, pattern, offset);
559 readback = sram_read(lanai, offset);
564 lanai->number, offset,
569 static int __devinit sram_test_pass(const struct lanai_dev *lanai, u32 pattern)
573 result = sram_test_word(lanai, offset, pattern);
577 static int __devinit sram_test_and_clear(const struct lanai_dev *lanai)
582 if ((result = sram_test_pass(lanai, 0x5555)) != 0)
584 if ((result = sram_test_pass(lanai, 0xAAAA)) != 0)
588 return sram_test_pass(lanai, 0x0000);
643 static inline bus_addr_t cardvcc_addr(const struct lanai_dev *lanai,
646 return sram_addr(lanai, vci * CARDVCC_SIZE);
768 * Unfortunately the lanai needs us to wait until all the data
774 static void lanai_shutdown_tx_vci(struct lanai_dev *lanai,
788 __clear_bit(lvcc->vci, lanai->backlog_vccs);
830 static inline int aal0_buffer_allocate(struct lanai_dev *lanai)
833 lanai_buf_allocate(&lanai->aal0buf, AAL0_RX_BUFFER_SIZE, 80,
834 lanai->pci);
835 return (lanai->aal0buf.start == NULL) ? -ENOMEM : 0;
838 static inline void aal0_buffer_free(struct lanai_dev *lanai)
841 lanai_buf_deallocate(&lanai->aal0buf, lanai->pci);
863 static int __devinit eeprom_read(struct lanai_dev *lanai)
866 lanai->number);
867 memset(&lanai->eeprom[EEPROM_MAC], 0, 6);
871 static int __devinit eeprom_validate(struct lanai_dev *lanai)
873 lanai->serialno = 0;
874 lanai->magicno = EEPROM_MAGIC_VALUE;
880 static int __devinit eeprom_read(struct lanai_dev *lanai)
885 #define set_config1(x) do { lanai->conf1 = x; conf1_write(lanai); \
887 #define clock_h() set_config1(lanai->conf1 | CONFIG1_PROMCLK)
888 #define clock_l() set_config1(lanai->conf1 &~ CONFIG1_PROMCLK)
889 #define data_h() set_config1(lanai->conf1 | CONFIG1_PROMDATA)
890 #define data_l() set_config1(lanai->conf1 &~ CONFIG1_PROMDATA)
892 #define read_pin() (reg_read(lanai, Status_Reg) & STATUS_PROMDATA)
903 tmp = (lanai->conf1 & ~CONFIG1_PROMDATA) |
905 if (lanai->conf1 != tmp) {
928 lanai->eeprom[address] = data;
937 lanai->number, address);
950 static inline u32 eeprom_be4(const struct lanai_dev *lanai, int address)
952 return be32_to_cpup((const u32 *) &lanai->eeprom[address]);
956 static int __devinit eeprom_validate(struct lanai_dev *lanai)
960 const u8 *e = lanai->eeprom;
980 "(wanted 0x%02X, got 0x%02X)\n", lanai->number,
987 "bad (wanted 0x%02X, got 0x%02X)\n", lanai->number,
996 "(0x%02X, inverse 0x%02X)\n", lanai->number,
1003 lanai->serialno = eeprom_be4(lanai, EEPROM_SERIAL);
1004 v = eeprom_be4(lanai, EEPROM_SERIAL_REV);
1005 if ((lanai->serialno ^ v) != 0xFFFFFFFF) {
1007 "don't match (0x%08X, inverse 0x%08X)\n", lanai->number,
1008 (unsigned int) lanai->serialno, (unsigned int) v);
1011 DPRINTK("eeprom: Serial number = %d\n", (unsigned int) lanai->serialno);
1013 lanai->magicno = eeprom_be4(lanai, EEPROM_MAGIC);
1014 v = eeprom_be4(lanai, EEPROM_MAGIC_REV);
1015 if ((lanai->magicno ^ v) != 0xFFFFFFFF) {
1017 "don't match (0x%08X, inverse 0x%08X)\n", lanai->number,
1018 lanai->magicno, v);
1021 DPRINTK("eeprom: Magic number = 0x%08X\n", lanai->magicno);
1022 if (lanai->magicno != EEPROM_MAGIC_VALUE)
1025 lanai->number, (unsigned int) lanai->magicno,
1032 static inline const u8 *eeprom_mac(const struct lanai_dev *lanai)
1034 return &lanai->eeprom[EEPROM_MAC];
1053 #define INT_TABORTSENT (0x00004000) /* Target abort sent by lanai */
1064 static inline u32 intr_pending(const struct lanai_dev *lanai)
1066 return reg_read(lanai, IntStatusMasked_Reg);
1069 static inline void intr_enable(const struct lanai_dev *lanai, u32 i)
1071 reg_write(lanai, i, IntControlEna_Reg);
1074 static inline void intr_disable(const struct lanai_dev *lanai, u32 i)
1076 reg_write(lanai, i, IntControlDis_Reg);
1088 static void lanai_check_status(struct lanai_dev *lanai)
1090 u32 new = reg_read(lanai, Status_Reg);
1091 u32 changes = new ^ lanai->status;
1092 lanai->status = new;
1095 status_message(lanai->number, name, new & flag)
1108 static void pcistatus_check(struct lanai_dev *lanai, int clearonly)
1112 result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
1115 "%d\n", lanai->number, result);
1123 result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
1126 "%d\n", lanai->number, result);
1131 pcistatus_got(lanai->number, name); \
1132 ++lanai->stats.pcierr_##stat; \
1245 static inline void lanai_endtx(struct lanai_dev *lanai,
1261 spin_lock(&lanai->endtxlock);
1268 for (i = 0; reg_read(lanai, Status_Reg) & STATUS_BUTTBUSY; i++) {
1271 "always busy!\n", lanai->number);
1282 reg_write(lanai, (ptr << 12) | lvcc->vci, Butt_Reg);
1283 spin_unlock(&lanai->endtxlock);
1290 static void lanai_send_one_aal5(struct lanai_dev *lanai,
1304 lanai_endtx(lanai, lvcc);
1310 static void vcc_tx_unqueue_aal5(struct lanai_dev *lanai,
1329 lanai_send_one_aal5(lanai, lvcc, skb, n);
1334 __clear_bit(lvcc->vci, lanai->backlog_vccs);
1339 static void vcc_tx_aal5(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1350 __set_bit(lvcc->vci, lanai->backlog_vccs);
1355 lanai_send_one_aal5(lanai, lvcc, skb, n);
1358 static void vcc_tx_unqueue_aal0(struct lanai_dev *lanai,
1365 static void vcc_tx_aal0(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1435 static void vcc_rx_aal0(struct lanai_dev *lanai)
1451 static int __devinit vcc_table_allocate(struct lanai_dev *lanai)
1454 APRINTK((lanai->num_vci) * sizeof(struct lanai_vcc *) <= PAGE_SIZE,
1456 lanai->vccs = (struct lanai_vcc **) get_zeroed_page(GFP_KERNEL);
1457 return (lanai->vccs == NULL) ? -ENOMEM : 0;
1459 int bytes = (lanai->num_vci) * sizeof(struct lanai_vcc *);
1460 lanai->vccs = (struct lanai_vcc **) vmalloc(bytes);
1461 if (unlikely(lanai->vccs == NULL))
1463 memset(lanai->vccs, 0, bytes);
1468 static inline void vcc_table_deallocate(const struct lanai_dev *lanai)
1471 free_page((unsigned long) lanai->vccs);
1473 vfree(lanai->vccs);
1491 static int lanai_get_sized_buffer(struct lanai_dev *lanai,
1500 lanai_buf_allocate(buf, size, max_sdu + 32, lanai->pci);
1505 "for %s buffer, got only %Zu\n", lanai->number, size,
1512 static inline int lanai_setup_rx_vci_aal5(struct lanai_dev *lanai,
1515 return lanai_get_sized_buffer(lanai, &lvcc->rx.buf,
1520 static int lanai_setup_tx_vci(struct lanai_dev *lanai, struct lanai_vcc *lvcc,
1533 return lanai_get_sized_buffer(lanai, &lvcc->tx.buf, max_sdu,
1537 static inline void host_vcc_bind(struct lanai_dev *lanai,
1544 if (lanai->nbound++ == 0) {
1546 lanai->conf1 &= ~CONFIG1_POWERDOWN;
1547 conf1_write(lanai);
1548 conf2_write(lanai);
1551 lvcc->vbase = cardvcc_addr(lanai, vci);
1552 lanai->vccs[lvcc->vci = vci] = lvcc;
1555 static inline void host_vcc_unbind(struct lanai_dev *lanai,
1562 lanai->vccs[lvcc->vci] = NULL;
1564 if (--lanai->nbound == 0) {
1566 lanai->conf1 |= CONFIG1_POWERDOWN;
1567 conf1_write(lanai);
1574 static void lanai_reset(struct lanai_dev *lanai)
1577 "implemented\n", lanai->number);
1583 reg_write(lanai, INT_ALL, IntAck_Reg);
1584 lanai->stats.card_reset++;
1592 static int __devinit service_buffer_allocate(struct lanai_dev *lanai)
1594 lanai_buf_allocate(&lanai->service, SERVICE_ENTRIES * 4, 8,
1595 lanai->pci);
1596 if (unlikely(lanai->service.start == NULL))
1599 (unsigned long) lanai->service.start,
1600 lanai_buf_size(&lanai->service),
1601 lanai_buf_size_cardorder(&lanai->service));
1603 reg_write(lanai, 0, ServWrite_Reg);
1605 reg_write(lanai,
1606 SSTUFF_SET_SIZE(lanai_buf_size_cardorder(&lanai->service)) |
1607 SSTUFF_SET_ADDR(lanai->service.dmaaddr),
1612 static inline void service_buffer_deallocate(struct lanai_dev *lanai)
1614 lanai_buf_deallocate(&lanai->service, lanai->pci);
1630 static int handle_service(struct lanai_dev *lanai, u32 s)
1635 lvcc = lanai->vccs[vci];
1639 "vcc %d\n", lanai->number, (unsigned int) s, vci);
1641 lanai->stats.service_notx++;
1643 lanai->stats.service_norx++;
1650 "vcc %d\n", lanai->number, (unsigned int) s, vci);
1651 lanai->stats.service_notx++;
1654 __set_bit(vci, lanai->transmit_ready);
1662 "vcc %d\n", lanai->number, (unsigned int) s, vci);
1663 lanai->stats.service_norx++;
1669 "vcc %d\n", lanai->number, (unsigned int) s, vci);
1670 lanai->stats.service_rxnotaal5++;
1690 lanai->stats.ovfl_trash += (bytes / 48);
1698 "PDU on VCI %d!\n", lanai->number, vci);
1699 lanai_reset(lanai);
1712 static void iter_transmit(struct lanai_dev *lanai, vci_t vci)
1714 struct lanai_vcc *lvcc = lanai->vccs[vci];
1716 lvcc->tx.unqueue(lanai, lvcc, lvcc->tx.endptr);
1720 * interrupts otherwise disabled and with the lanai->servicelock
1723 static void run_service(struct lanai_dev *lanai)
1726 u32 wreg = reg_read(lanai, ServWrite_Reg);
1727 const u32 *end = lanai->service.start + wreg;
1728 while (lanai->service.ptr != end) {
1729 ntx += handle_service(lanai,
1730 le32_to_cpup(lanai->service.ptr++));
1731 if (lanai->service.ptr >= lanai->service.end)
1732 lanai->service.ptr = lanai->service.start;
1734 reg_write(lanai, wreg, ServRead_Reg);
1737 vci_bitfield_iterate(lanai, lanai->transmit_ready,
1739 bitmap_zero(lanai->transmit_ready, NUM_VCI);
1746 static void get_statistics(struct lanai_dev *lanai)
1748 u32 statreg = reg_read(lanai, Statistics_Reg);
1749 lanai->stats.atm_ovfl += STATS_GET_FIFO_OVFL(statreg);
1750 lanai->stats.hec_err += STATS_GET_HEC_ERR(statreg);
1751 lanai->stats.vci_trash += STATS_GET_BAD_VCI(statreg);
1752 lanai->stats.ovfl_trash += STATS_GET_BUF_OVFL(statreg);
1759 static void iter_dequeue(struct lanai_dev *lanai, vci_t vci)
1761 struct lanai_vcc *lvcc = lanai->vccs[vci];
1765 __clear_bit(vci, lanai->backlog_vccs);
1769 lvcc->tx.unqueue(lanai, lvcc, endptr);
1775 struct lanai_dev *lanai = (struct lanai_dev *) arg;
1779 if (lanai->conf1 & CONFIG1_POWERDOWN)
1784 if (spin_trylock(&lanai->servicelock)) {
1785 run_service(lanai);
1786 spin_unlock(&lanai->servicelock);
1791 vci_bitfield_iterate(lanai, lanai->backlog_vccs, iter_dequeue);
1795 get_statistics(lanai);
1797 mod_timer(&lanai->timer, jiffies + LANAI_POLL_PERIOD);
1800 static inline void lanai_timed_poll_start(struct lanai_dev *lanai)
1802 init_timer(&lanai->timer);
1803 lanai->timer.expires = jiffies + LANAI_POLL_PERIOD;
1804 lanai->timer.data = (unsigned long) lanai;
1805 lanai->timer.function = lanai_timed_poll;
1806 add_timer(&lanai->timer);
1809 static inline void lanai_timed_poll_stop(struct lanai_dev *lanai)
1811 del_timer_sync(&lanai->timer);
1816 static inline void lanai_int_1(struct lanai_dev *lanai, u32 reason)
1821 spin_lock(&lanai->servicelock);
1822 run_service(lanai);
1823 spin_unlock(&lanai->servicelock);
1827 vcc_rx_aal0(lanai);
1834 get_statistics(lanai);
1838 lanai_check_status(lanai);
1843 lanai->number, (unsigned int) (reason & INT_DMASHUT),
1844 (unsigned int) reg_read(lanai, DMA_Addr_Reg));
1846 lanai_reset(lanai);
1851 lanai->number);
1852 conf1_write(lanai);
1853 lanai->stats.dma_reenable++;
1854 pcistatus_check(lanai, 0);
1859 lanai->number);
1860 pcistatus_check(lanai, 0);
1864 "segmentation shutdown, reason=0x%08X\n", lanai->number,
1866 lanai_reset(lanai);
1872 lanai->number,
1874 lanai_reset(lanai);
1886 reg_write(lanai, ack, IntAck_Reg);
1891 struct lanai_dev *lanai = devid;
1900 if (unlikely(lanai->conf1 & CONFIG1_POWERDOWN))
1904 reason = intr_pending(lanai);
1911 lanai_int_1(lanai, reason);
1912 reason = intr_pending(lanai);
1946 static int __devinit lanai_pci_start(struct lanai_dev *lanai)
1948 struct pci_dev *pci = lanai->pci;
1954 "PCI device", lanai->number);
1960 "(itf %d): No suitable DMA available.\n", lanai->number);
1965 "(itf %d): No suitable DMA available.\n", lanai->number);
1971 "PCI_SUBSYSTEM_ID: %d\n", lanai->number, result);
1977 /* Set latency timer to zero as per lanai docs */
1981 "PCI_LATENCY_TIMER: %d\n", lanai->number, result);
1984 pcistatus_check(lanai, 1);
1985 pcistatus_check(lanai, 0);
1997 static inline int vci0_is_ok(struct lanai_dev *lanai,
2003 if (lanai->naal0 != 0)
2005 lanai->conf2 |= CONFIG2_VCI0_NORMAL;
2006 conf2_write_if_powerup(lanai);
2014 static int vci_is_ok(struct lanai_dev *lanai, vci_t vci,
2018 const struct lanai_vcc *lvcc = lanai->vccs[vci];
2019 if (vci == 0 && !vci0_is_ok(lanai, qos))
2029 lanai->cbrvcc != NULL && lanai->cbrvcc != atmvcc)
2032 if (qos->aal == ATM_AAL0 && lanai->naal0 == 0 &&
2034 const struct lanai_vcc *vci0 = lanai->vccs[0];
2037 lanai->conf2 &= ~CONFIG2_VCI0_NORMAL;
2038 conf2_write_if_powerup(lanai);
2043 static int lanai_normalize_ci(struct lanai_dev *lanai,
2057 for (*vcip = ATM_NOT_RSV_VCI; *vcip < lanai->num_vci;
2059 if (vci_is_ok(lanai, *vcip, atmvcc))
2063 if (*vcip >= lanai->num_vci || *vcip < 0 ||
2064 !vci_is_ok(lanai, *vcip, atmvcc))
2117 static inline void lanai_cbr_setup(struct lanai_dev *lanai)
2119 reg_write(lanai, pcr_to_cbricg(&lanai->cbrvcc->qos), CBR_ICG_Reg);
2120 reg_write(lanai, lanai->cbrvcc->vci, CBR_PTR_Reg);
2121 lanai->conf2 |= CONFIG2_CBR_ENABLE;
2122 conf2_write(lanai);
2125 static inline void lanai_cbr_shutdown(struct lanai_dev *lanai)
2127 lanai->conf2 &= ~CONFIG2_CBR_ENABLE;
2128 conf2_write(lanai);
2136 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2142 lanai->number = atmdev->number;
2143 lanai->num_vci = NUM_VCI;
2144 bitmap_zero(lanai->backlog_vccs, NUM_VCI);
2145 bitmap_zero(lanai->transmit_ready, NUM_VCI);
2146 lanai->naal0 = 0;
2148 lanai->nbound = 0;
2150 lanai->cbrvcc = NULL;
2151 memset(&lanai->stats, 0, sizeof lanai->stats);
2152 spin_lock_init(&lanai->endtxlock);
2153 spin_lock_init(&lanai->servicelock);
2156 while (1 << atmdev->ci_range.vci_bits < lanai->num_vci)
2161 if ((result = lanai_pci_start(lanai)) != 0)
2163 raw_base = lanai->pci->resource[0].start;
2164 lanai->base = (bus_addr_t) ioremap(raw_base, LANAI_MAPPING_SIZE);
2165 if (lanai->base == NULL) {
2169 /* 3.3: Reset lanai and PHY */
2170 reset_board(lanai);
2171 lanai->conf1 = reg_read(lanai, Config1_Reg);
2172 lanai->conf1 &= ~(CONFIG1_GPOUT1 | CONFIG1_POWERDOWN |
2174 lanai->conf1 |= CONFIG1_SET_LEDMODE(LEDMODE_NOT_SOOL);
2175 reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg);
2177 conf1_write(lanai);
2189 reg_read(lanai, Reset_Reg), &lanai->board_rev);
2194 if ((result = eeprom_read(lanai)) != 0)
2196 if ((result = eeprom_validate(lanai)) != 0)
2200 reg_write(lanai, lanai->conf1 | CONFIG1_GPOUT1, Config1_Reg);
2202 conf1_write(lanai);
2204 lanai->conf1 |= (CONFIG1_GPOUT2 | CONFIG1_GPOUT3 | CONFIG1_DMA_ENABLE);
2205 conf1_write(lanai);
2208 if ((result = sram_test_and_clear(lanai)) != 0)
2211 /* 3.10: initialize lanai registers */
2212 lanai->conf1 |= CONFIG1_DMA_ENABLE;
2213 conf1_write(lanai);
2214 if ((result = service_buffer_allocate(lanai)) != 0)
2216 if ((result = vcc_table_allocate(lanai)) != 0)
2218 lanai->conf2 = (lanai->num_vci >= 512 ? CONFIG2_HOWMANY : 0) |
2220 conf2_write(lanai);
2221 reg_write(lanai, TX_FIFO_DEPTH, TxDepth_Reg);
2222 reg_write(lanai, 0, CBR_ICG_Reg); /* CBR defaults to no limit */
2223 if ((result = request_irq(lanai->pci->irq, lanai_int, IRQF_SHARED,
2224 DEV_LABEL, lanai)) != 0) {
2229 intr_enable(lanai, INT_ALL & ~(INT_PING | INT_WAKE));
2231 lanai->conf1 = (lanai->conf1 & ~CONFIG1_MASK_LOOPMODE) |
2234 conf1_write(lanai);
2235 lanai->status = reg_read(lanai, Status_Reg);
2238 lanai->conf1 |= CONFIG1_POWERDOWN;
2239 conf1_write(lanai);
2241 memcpy(atmdev->esi, eeprom_mac(lanai), ESI_LEN);
2242 lanai_timed_poll_start(lanai);
2244 "(%02X-%02X-%02X-%02X-%02X-%02X)\n", lanai->number,
2245 (int) lanai->pci->revision, (unsigned long) lanai->base,
2246 lanai->pci->irq,
2250 "board_rev=%d\n", lanai->number,
2251 lanai->type==lanai2 ? "2" : "HB", (unsigned int) lanai->serialno,
2252 (unsigned int) lanai->serialno, lanai->board_rev);
2256 vcc_table_deallocate(lanai);
2258 service_buffer_deallocate(lanai);
2260 reset_board(lanai);
2262 lanai->conf1 = reg_read(lanai, Config1_Reg) | CONFIG1_POWERDOWN;
2263 conf1_write(lanai);
2265 iounmap(lanai->base);
2267 pci_disable_device(lanai->pci);
2277 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2279 lanai->number);
2280 lanai_timed_poll_stop(lanai);
2282 lanai->conf1 = reg_read(lanai, Config1_Reg) & ~CONFIG1_POWERDOWN;
2283 conf1_write(lanai);
2285 intr_disable(lanai, INT_ALL);
2286 free_irq(lanai->pci->irq, lanai);
2287 reset_board(lanai);
2289 lanai->conf1 |= CONFIG1_POWERDOWN;
2290 conf1_write(lanai);
2292 pci_disable_device(lanai->pci);
2293 vcc_table_deallocate(lanai);
2294 service_buffer_deallocate(lanai);
2295 iounmap(lanai->base);
2296 kfree(lanai);
2303 struct lanai_dev *lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2311 if (--lanai->naal0 <= 0)
2312 aal0_buffer_free(lanai);
2314 lanai_buf_deallocate(&lvcc->rx.buf, lanai->pci);
2318 if (atmvcc == lanai->cbrvcc) {
2320 lanai_cbr_shutdown(lanai);
2321 lanai->cbrvcc = NULL;
2323 lanai_shutdown_tx_vci(lanai, lvcc);
2324 lanai_buf_deallocate(&lvcc->tx.buf, lanai->pci);
2328 host_vcc_unbind(lanai, lvcc);
2338 struct lanai_dev *lanai;
2347 lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2348 result = lanai_normalize_ci(lanai, atmvcc, &vpi, &vci);
2354 DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n", lanai->number,
2356 lvcc = lanai->vccs[vci];
2368 if (lanai->naal0 == 0)
2369 result = aal0_buffer_allocate(lanai);
2372 lanai, lvcc, &atmvcc->qos);
2382 lanai->naal0++;
2387 result = lanai_setup_tx_vci(lanai, lvcc, &atmvcc->qos);
2392 APRINTK(lanai->cbrvcc == NULL,
2394 lanai->cbrvcc = atmvcc;
2397 host_vcc_bind(lanai, lvcc, vci);
2407 if (lanai->cbrvcc == atmvcc)
2408 lanai_cbr_setup(lanai);
2421 struct lanai_dev *lanai = (struct lanai_dev *) atmvcc->dev->dev_data;
2431 if (unlikely(lanai == NULL)) {
2432 DPRINTK("lanai_send: lanai==NULL for vci=%d\n", atmvcc->vci);
2440 vcc_tx_aal5(lanai, lvcc, skb);
2449 vcc_tx_aal0(lanai, lvcc, skb);
2471 struct lanai_dev *lanai = (struct lanai_dev *) atmdev->dev_data;
2477 atmdev->number, lanai->type==lanai2 ? "2" : "HB",
2478 (unsigned int) lanai->serialno,
2479 (unsigned int) lanai->magicno, lanai->num_vci);
2482 lanai->board_rev, (int) lanai->pci->revision);
2485 &lanai->eeprom[EEPROM_MAC]);
2488 "GPIN=%d\n", (lanai->status & STATUS_SOOL) ? 1 : 0,
2489 (lanai->status & STATUS_LOCD) ? 1 : 0,
2490 (lanai->status & STATUS_LED) ? 1 : 0,
2491 (lanai->status & STATUS_GPIN) ? 1 : 0);
2494 "aal0_rx=%Zu\n", lanai_buf_size(&lanai->service),
2495 lanai->naal0 ? lanai_buf_size(&lanai->aal0buf) : 0);
2497 get_statistics(lanai);
2500 lanai->stats.ovfl_trash, lanai->stats.vci_trash,
2501 lanai->stats.hec_err, lanai->stats.atm_ovfl);
2506 lanai->stats.pcierr_parity_detect,
2507 lanai->stats.pcierr_serr_set,
2508 lanai->stats.pcierr_m_target_abort);
2511 "master_parity=%u\n", lanai->stats.pcierr_s_target_abort,
2512 lanai->stats.pcierr_master_parity);
2515 "no_rx=%u, bad_rx_aal=%u\n", lanai->stats.service_norx,
2516 lanai->stats.service_notx,
2517 lanai->stats.service_rxnotaal5);
2520 lanai->stats.dma_reenable, lanai->stats.card_reset);
2528 if ((lvcc = lanai->vccs[left]) != NULL)
2553 lvcc->tx.atmvcc == lanai->cbrvcc ? 'C' : 'U',
2583 struct lanai_dev *lanai;
2587 lanai = kmalloc(sizeof(*lanai), GFP_KERNEL);
2588 if (lanai == NULL) {
2598 kfree(lanai);
2602 atmdev->dev_data = lanai;
2603 lanai->pci = pci;
2604 lanai->type = (enum lanai_type) ident->device;
2610 kfree(lanai);