Lines Matching refs:treg
235 u32 treg[2][2];
376 writel(priv->treg[device][0], rbase + IDE_KAUAI_PIO_CONFIG);
377 writel(priv->treg[device][1], rbase + IDE_KAUAI_ULTRA_CONFIG);
379 writel(priv->treg[device][0], rbase + IDE_TIMING_CONFIG);
404 priv->treg[adev->devno][0] = priv->treg[adev->devno][1] = 0;
415 /* PIO timings only ever use the first treg */
416 priv->treg[adev->devno][0] |= t->reg1;
427 priv->treg[adev->devno][0] |= t->reg1;
428 priv->treg[adev->devno][1] |= t->reg2;
431 priv->treg[adev->devno][0],
432 priv->treg[adev->devno][1]);
468 priv->treg[0][0] = priv->treg[1][0] = value;
469 priv->treg[0][1] = priv->treg[1][1] = value2;
604 (priv->treg[dev][0] & TR_66_UDMA_EN)) {
606 u32 reg = priv->treg[dev][0];