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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/powerpc/xmon/

Lines Matching defs:BO

152      This sets the y bit of the BO field appropriately.  */
164 This sets the y bit of the BO field appropriately. */
193 /* The BO field in a B form instruction. Certain values are
195 #define BO BI + 1
199 /* The BO field in a B form instruction when the + or - modifier is
200 used. This is like the BO field, but it must be even. */
201 #define BOE BO + 1
683 (ie. not Power4 compatible), we set the y bit of the BO field to 1
690 in BO field, the "a" bit is 00010 for branch on CR(BI) and 01000
779 /* Check for legal values of a BO field. */
830 /* The BO field in a B form instruction. Warn about attempts to set
857 /* The BO field in a B form instruction when the + or - modifier is
858 used. This is like the BO field, but it must be even. When
1560 /* A B form instruction setting the BO field. */
1564 /* A BBO_MASK with the y bit of the BO field removed. This permits
1573 /* A B form instruction setting the BO field and the condition bits of
1579 /* A BBOCB_MASK with the y bit of the BO field removed. */
1753 /* An XL form instruction which explicitly sets the BO field. */
1758 /* An XL form instruction which explicitly sets the y bit of the BO
1763 /* An XL form instruction which sets the BO field and the condition
1777 /* An XL_MASK with the BO and BB fields fixed. */
1780 /* An XL_MASK with the BO, BI and BB fields fixed. */
1823 /* The BO encodings used in extended conditional branch mnemonics. */
2520 { "bce", B(9,0,0), B_MASK, BOOKE64, { BO, BI, BD } },
2521 { "bcel", B(9,0,1), B_MASK, BOOKE64, { BO, BI, BD } },
2522 { "bcea", B(9,1,0), B_MASK, BOOKE64, { BO, BI, BDA } },
2523 { "bcela", B(9,1,1), B_MASK, BOOKE64, { BO, BI, BDA } },
2810 { "bc", B(16,0,0), B_MASK, COM, { BO, BI, BD } },
2813 { "bcl", B(16,0,1), B_MASK, COM, { BO, BI, BD } },
2816 { "bca", B(16,1,0), B_MASK, COM, { BO, BI, BDA } },
2819 { "bcla", B(16,1,1), B_MASK, COM, { BO, BI, BDA } },
3050 { "bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, { BO, BI, BH } },
3051 { "bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, { BO, BI, BH } },
3052 { "bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, { BO, BI } },
3053 { "bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, { BO, BI } },
3054 { "bclre", XLLK(19,17,0), XLBB_MASK, BOOKE64, { BO, BI } },
3055 { "bclrel", XLLK(19,17,1), XLBB_MASK, BOOKE64, { BO, BI } },
3243 { "bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, { BO, BI, BH } },
3244 { "bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, { BO, BI, BH } },
3245 { "bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, { BO, BI } },
3246 { "bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, { BO, BI } },
3247 { "bcctre", XLLK(19,529,0), XLYBB_MASK, BOOKE64, { BO, BI } },
3248 { "bcctrel", XLLK(19,529,1), XLYBB_MASK, BOOKE64, { BO, BI } },