Lines Matching refs:ehci
28 static int ehci_pci_reinit(struct ehci_hcd *ehci, struct pci_dev *pdev)
39 ehci_dbg(ehci, "MWI active\n");
44 static int ehci_quirk_amd_hudson(struct ehci_hcd *ehci)
72 ehci_info(ehci, "QUIRK: Enable exception for AMD Hudson ASPM\n");
83 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
95 ehci->big_endian_mmio = 1;
97 ehci_warn(ehci,
104 ehci->caps = hcd->regs;
105 ehci->regs = hcd->regs +
106 HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
108 dbg_hcs_params(ehci, "reset");
109 dbg_hcc_params(ehci, "reset");
128 ehci_warn(ehci, "can't enable NVidia "
136 ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
138 if (ehci_quirk_amd_hudson(ehci))
139 ehci->amd_l1_fix = 1;
141 retval = ehci_halt(ehci);
152 ehci->need_io_watchdog = 0;
155 ehci->need_io_watchdog = 0;
156 ehci->fs_i_thresh = 1;
158 ehci->broken_periodic = 1;
159 ehci_info(ehci, "using broken periodic workaround\n");
163 ehci_info(ehci, "disable lpm for langwell/penwell\n");
164 ehci->has_lpm = 0;
170 tdi_reset(ehci);
176 ehci_info(ehci, "ignoring AMD8111 (errata)\n");
188 ehci->no_selective_suspend = 1;
197 ehci_info(ehci, "disable lpm/ppcd for nvidia mcp89");
198 ehci->has_lpm = 0;
199 ehci->has_ppcd = 0;
200 ehci->command &= ~CMD_PPCEE;
232 ehci_info(ehci, "applying AMD SB600/SB700 USB "
249 ehci->debug = ehci_to_hcd(ehci)->regs + temp;
250 temp = ehci_readl(ehci, &ehci->debug->control);
251 ehci_info(ehci, "debug port %d%s\n",
252 HCS_DEBUG_PORT(ehci->hcs_params),
257 ehci->debug = NULL;
261 ehci_reset(ehci);
264 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
266 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
267 ehci_dbg(ehci, "bogus port configuration: "
269 HCS_N_CC(ehci->hcs_params),
270 HCS_N_PCC(ehci->hcs_params),
271 HCS_N_PORTS(ehci->hcs_params));
276 temp |= (ehci->hcs_params & ~0xf);
277 ehci->hcs_params = temp;
286 pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
314 if (ehci->no_selective_suspend && device_can_wakeup(&pdev->dev))
315 ehci_warn(ehci, "selective suspend/wakeup unavailable\n");
318 ehci_port_power(ehci, 1);
319 retval = ehci_pci_reinit(ehci, pdev);
339 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
343 if (time_before(jiffies, ehci->next_statechange))
350 ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
351 spin_lock_irqsave (&ehci->lock, flags);
352 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
353 (void)ehci_readl(ehci, &ehci->regs->intr_enable);
356 spin_unlock_irqrestore (&ehci->lock, flags);
366 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
371 if (time_before(jiffies, ehci->next_statechange))
381 if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
385 ehci_prepare_ports_for_controller_resume(ehci);
388 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
389 ehci_readl(ehci, &ehci->regs->intr_enable);
398 (void) ehci_halt(ehci);
399 (void) ehci_reset(ehci);
400 (void) ehci_pci_reinit(ehci, pdev);
403 spin_lock_irq(&ehci->lock);
404 if (ehci->reclaim)
405 end_unlink_async(ehci);
406 ehci_work(ehci);
407 spin_unlock_irq(&ehci->lock);
409 ehci_writel(ehci, ehci->command, &ehci->regs->command);
410 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
411 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
414 ehci_port_power(ehci, 1);
423 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
429 if (ehci->has_lpm && !udev->parent->parent) {
430 rc = ehci_lpm_set_da(ehci, udev->devnum, udev->portnum);
432 rc = ehci_lpm_check(ehci, udev->portnum);