Lines Matching refs:BIT0
537 #define ISO_MD2PP BIT0 // MACTOP/BB/PCIe Digital to Power On.
558 #define SYS_CLKSEL_80M BIT0 // System Clock 80MHz
580 #define AFE_BGEN BIT0 // Enable AFE Macro Block's Bandgap.
586 #define SPS1_LDEN BIT0 // Enable VSPS12 LDO Macro block.
591 #define RF_EN BIT0 // Enable RF module.
598 #define LDA15_EN BIT0 // Enable LDOA15 Macro Block
603 #define LDV12_EN BIT0 // Enable LDOVD12 Macro Block
615 #define APLL_EN BIT0 // Enable AFE PLL Macro Block.
618 #define AFR_CardBEn BIT0
651 #define StopBK BIT0
667 #define LBK_MAC_LB (BIT0|BIT1|BIT3)
668 #define LBK_MAC_DLB (BIT0|BIT1)
669 #define LBK_DMA_LB (BIT0|BIT1|BIT2)
685 #define FWALLRDY (BIT0|BIT1|BIT2|BIT3|BIT4|BIT5|BIT6|BIT7)
693 #define IMEM_CODE_DONE BIT0
695 #define IMEM_CODE_DONE BIT0
743 #define RCR_AAP BIT0 //Accept all unicast packet
774 #define ENBT BIT0
826 #define RRSR_1M BIT0
909 #define AcmHw_HwEn BIT0
937 #define BW_OPMODE_11J BIT0
979 #define SCR_TxUseDK BIT0 //Force Tx Use Default Key
1014 #define WOW_PMEN BIT0 // Power management Enable.
1028 #define GPIOSEL_GPIO_MASK ~(BIT0|BIT1)
1035 #define HST_RDBUSY BIT0
1052 #define IMR_BCNDMAINT7 BIT0 // Beacon DMA Interrupt 7
1086 #define IMR_ROK BIT0 // Receive DMA OK Interrupt
1098 #define TPPoll_BKQ BIT0 // BK queue polling
1135 #define CCX_CMD_CLM_ENABLE BIT0 // Enable Channel Load
1210 #define EEPROM_USB_SN BIT0