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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192e/

Lines Matching defs:eRFPath

1400 static u32 phy_FwRFSerialRead(struct net_device* dev,RF90_RADIO_PATH_E	eRFPath,u32 Offset);
1401 static void phy_FwRFSerialWrite(struct net_device* dev,RF90_RADIO_PATH_E eRFPath,u32 Offset,u32 Data);
1426 u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
1437 if(eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
1439 else if(eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
1448 if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B)
1450 else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
1504 * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
1510 static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset)
1515 BB_REGISTER_DEFINITION_T* pPhyReg = &priv->PHYRegDef[eRFPath];
1534 priv->RfReg0Value[eRFPath] |= 0x140;
1536 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
1542 priv->RfReg0Value[eRFPath] |= 0x100;
1543 priv->RfReg0Value[eRFPath] &= (~0x40);
1545 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16) );
1574 priv->RfReg0Value[eRFPath] &= 0xebf;
1580 (priv->RfReg0Value[eRFPath] << 16));
1609 * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
1626 static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 Offset, u32 Data)
1630 BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
1648 priv->RfReg0Value[eRFPath] |= 0x140;
1649 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath] << 16));
1654 priv->RfReg0Value[eRFPath] |= 0x100;
1655 priv->RfReg0Value[eRFPath] &= (~0x40);
1656 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, bMaskDWord, (priv->RfReg0Value[eRFPath]<<16));
1676 priv->RfReg0Value[eRFPath] = Data;
1683 priv->RfReg0Value[eRFPath] &= 0xebf;
1688 (priv->RfReg0Value[eRFPath] << 16));
1715 * RF90_RADIO_PATH_E eRFPath //radio path of A/B/C/D
1723 void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
1729 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
1743 Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
1747 phy_FwRFSerialWrite(dev, eRFPath, RegAddr, New_Value);
1749 phy_FwRFSerialWrite(dev, eRFPath, RegAddr, Data);
1757 Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
1761 rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, New_Value);
1763 rtl8192_phy_RFSerialWrite(dev, eRFPath, RegAddr, Data);
1779 u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32 RegAddr, u32 BitMask)
1783 if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
1792 Original_Value = phy_FwRFSerialRead(dev, eRFPath, RegAddr);
1797 Original_Value = rtl8192_phy_RFSerialRead(dev, eRFPath, RegAddr);
1816 RF90_RADIO_PATH_E eRFPath,
1831 Data |= ((eRFPath&0x3)<<20);
1878 RF90_RADIO_PATH_E eRFPath,
1884 //DbgPrint("N FW RF CTRL RF-%d OF%02x DATA=%03x\n\r", eRFPath, Offset, Data);
1894 Data |= ((eRFPath&0x3)<<20);
2164 * RF90_RADIO_PATH_E eRFPath //only used when checkblock is HW90_BLOCK_RF
2169 RT_STATUS rtl8192_phy_checkBBAndRF(struct net_device* dev, HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath)
2172 // BB_REGISTER_DEFINITION_T *pPhyReg = &priv->PHYRegDef[eRFPath];
2203 rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMask12Bits, WriteData[i]);
2206 dwRegRead = rtl8192_phy_QueryRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord);
2558 u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, RF90_RADIO_PATH_E eRFPath)
2565 switch(eRFPath){
2573 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioA_Array[i], bMask12Bits, Rtl819XRadioA_Array[i+1]);
2585 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioB_Array[i], bMask12Bits, Rtl819XRadioB_Array[i+1]);
2597 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioC_Array[i], bMask12Bits, Rtl819XRadioC_Array[i+1]);
2609 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioD_Array[i], bMask12Bits, Rtl819XRadioD_Array[i+1]);
2724 //RF90_RADIO_PATH_E eRFPath;
2725 u8 eRFPath;
2740 //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
2741 //for(eRFPath = 0; eRFPath <RF90_PATH_MAX; eRFPath++)
2743 //if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
2841 for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
2842 rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bMask12Bits, CurrentCmd->Para2<<7);