Lines Matching refs:pTxD
42 struct rt_txd * pTxD;
76 pTxD = (struct rt_txd *) pTxRing->Cell[TxIdx].AllocVa;
77 NdisZeroMemory(pTxD, TXD_SIZE);
79 pTxD->SDPtr0 = BufBasePaLow;
80 pTxD->SDLen0 = TXINFO_SIZE + TXWI_SIZE + hwHeaderLen; /* include padding */
81 pTxD->SDPtr1 = PCI_MAP_SINGLE(pAd, pTxBlk, 0, 1, PCI_DMA_TODEVICE);
82 pTxD->SDLen1 = pTxBlk->SrcBufLen;
83 pTxD->LastSec0 = 0;
84 pTxD->LastSec1 = (bIsLast) ? 1 : 0;
86 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
108 struct rt_txd * pTxD;
135 pTxD = (struct rt_txd *) pTxRing->Cell[TxIdx].AllocVa;
136 NdisZeroMemory(pTxD, TXD_SIZE);
138 pTxD->SDPtr0 = BufBasePaLow;
139 pTxD->SDLen0 = TXINFO_SIZE + TXWI_SIZE + hwHeaderLen; /* include padding */
140 pTxD->SDPtr1 = PCI_MAP_SINGLE(pAd, pTxBlk, 0, 1, PCI_DMA_TODEVICE);;
141 pTxD->SDLen1 = pTxBlk->SrcBufLen;
142 pTxD->LastSec0 = 0;
143 pTxD->LastSec1 = (bIsLast) ? 1 : 0;
145 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
166 struct rt_txd * pTxD;
213 pTxD = (struct rt_txd *) pTxRing->Cell[TxIdx].AllocVa;
214 NdisZeroMemory(pTxD, TXD_SIZE);
216 pTxD->SDPtr0 = BufBasePaLow;
217 pTxD->SDLen0 = firstDMALen; /* include padding */
218 pTxD->SDPtr1 = PCI_MAP_SINGLE(pAd, pTxBlk, 0, 1, PCI_DMA_TODEVICE);;
219 pTxD->SDLen1 = pTxBlk->SrcBufLen;
220 pTxD->LastSec0 = 0;
221 pTxD->LastSec1 = (bIsLast) ? 1 : 0;
223 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
258 struct rt_txd * pTxD;
269 pTxD = (struct rt_txd *) pTxRing->Cell[LastTxIdx].AllocVa;
271 pTxD->LastSec1 = 1;
281 struct rt_txd * pTxD;
308 pTxD = (struct rt_txd *) pTxRing->Cell[TxIdx].AllocVa;
309 NdisZeroMemory(pTxD, TXD_SIZE);
316 pTxD->SDPtr0 = BufBasePaLow;
317 pTxD->SDLen0 = firstDMALen; /* include padding */
318 pTxD->SDPtr1 = PCI_MAP_SINGLE(pAd, pTxBlk, 0, 1, PCI_DMA_TODEVICE);
319 pTxD->SDLen1 = pTxBlk->SrcBufLen;
320 pTxD->LastSec0 = 0;
321 pTxD->LastSec1 = 1;
323 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
349 struct rt_txd * pTxD;
352 pTxD = (struct rt_txd *) pAd->MgmtRing.Cell[SwIdx].AllocVa;
357 RTMPWriteTxDescriptor(pAd, pTxD, TRUE, FIFO_MGMT);
358 pTxD->LastSec0 = 1;
359 pTxD->LastSec1 = 1;
360 pTxD->DMADONE = 0;
361 pTxD->SDLen1 = 0;
362 pTxD->SDPtr0 =
364 pTxD->SDLen0 = SrcBufLen;
522 struct rt_txd * pTxD;
543 pTxD =
545 pOriTxD = pTxD;
546 NdisMoveMemory(&TxD, pTxD, sizeof(struct rt_txd));
547 pTxD = &TxD;
549 pTxD->DMADONE = 0;
555 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1,
556 pTxD->SDLen1,
569 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1,
570 pTxD->SDLen1,
581 (pTxD->SDLen1 + pTxD->SDLen0);
587 NdisMoveMemory(pOriTxD, pTxD, sizeof(struct rt_txd));
666 struct rt_txd * pTxD;
677 pTxD =
680 pTxD->DMADONE = 0;
684 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0,
693 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1,
873 struct rt_txd * pTxD;
904 pTxD = (struct rt_txd *) pAd->TxRing[QueIdx].Cell[SwIdx].AllocVa;
1020 RTMPWriteTxDescriptor(pAd, pTxD, TRUE, FIFO_EDCA);
1021 pTxD->LastSec0 = 1;
1022 pTxD->LastSec1 = 1;
1023 pTxD->SDLen0 = SrcBufLen;
1024 pTxD->SDLen1 = 0;
1025 pTxD->SDPtr0 = SrcBufPA;
1026 pTxD->DMADONE = 0;
1062 pTxD Pointer to transmit descriptor
1082 struct rt_txd * pTxD,
1091 pTxD->WIV = (bWIV) ? 1 : 0;
1092 pTxD->QSEL = (QueueSEL);
1094 /*pTxD->QSEL= FIFO_EDCA; */
1095 pTxD->DMADONE = 0;