Lines Matching refs:write_sa2400
47 static void write_sa2400(struct ieee80211_hw *dev, u8 addr, u32 data)
112 write_sa2400(dev, 7, txpw);
116 write_sa2400(dev, 0, chan);
117 write_sa2400(dev, 1, 0xbb50);
118 write_sa2400(dev, 2, 0x80);
119 write_sa2400(dev, 3, 0);
124 write_sa2400(dev, 4, 0);
150 write_sa2400(dev, 0, sa2400_chan[0]);
151 write_sa2400(dev, 1, 0xbb50);
152 write_sa2400(dev, 2, 0x80);
153 write_sa2400(dev, 3, 0);
154 write_sa2400(dev, 4, 0x19340 | firdac);
155 write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
156 write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
159 write_sa2400(dev, 4, 0x1938c); /*???*/
161 write_sa2400(dev, 4, 0x19340 | firdac);
163 write_sa2400(dev, 0, sa2400_chan[0]);
164 write_sa2400(dev, 1, 0xbb50);
165 write_sa2400(dev, 2, 0x80);
166 write_sa2400(dev, 3, 0);
167 write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
170 write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
171 write_sa2400(dev, 8, 0); /* VCO */
181 write_sa2400(dev, 4, 0x19341); /* calibrates DC */
184 * we rely on the 3ms delay introduced in write_sa2400 */
185 write_sa2400(dev, 4, 0x19345);
188 * we rely on the 3ms delay introduced in write_sa2400 */
196 write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */