Lines Matching refs:ug_regs
456 struct ucc_geth __iomem *ug_regs;
460 ug_regs = ugeth->ug_regs;
461 uf_regs = (struct ucc_fast __iomem *) ug_regs;
550 hardware_statistics->tx64 = in_be32(&ug_regs->tx64);
551 hardware_statistics->tx127 = in_be32(&ug_regs->tx127);
552 hardware_statistics->tx255 = in_be32(&ug_regs->tx255);
553 hardware_statistics->rx64 = in_be32(&ug_regs->rx64);
554 hardware_statistics->rx127 = in_be32(&ug_regs->rx127);
555 hardware_statistics->rx255 = in_be32(&ug_regs->rx255);
556 hardware_statistics->txok = in_be32(&ug_regs->txok);
557 hardware_statistics->txcf = in_be16(&ug_regs->txcf);
558 hardware_statistics->tmca = in_be32(&ug_regs->tmca);
559 hardware_statistics->tbca = in_be32(&ug_regs->tbca);
560 hardware_statistics->rxfok = in_be32(&ug_regs->rxfok);
561 hardware_statistics->rxbok = in_be32(&ug_regs->rxbok);
562 hardware_statistics->rbyt = in_be32(&ug_regs->rbyt);
563 hardware_statistics->rmca = in_be32(&ug_regs->rmca);
564 hardware_statistics->rbca = in_be32(&ug_regs->rbca);
598 ugeth_info("Base address: 0x%08x", (u32) ugeth->ug_regs);
601 (u32) & ugeth->ug_regs->maccfg1,
602 in_be32(&ugeth->ug_regs->maccfg1));
604 (u32) & ugeth->ug_regs->maccfg2,
605 in_be32(&ugeth->ug_regs->maccfg2));
607 (u32) & ugeth->ug_regs->ipgifg,
608 in_be32(&ugeth->ug_regs->ipgifg));
610 (u32) & ugeth->ug_regs->hafdup,
611 in_be32(&ugeth->ug_regs->hafdup));
613 (u32) & ugeth->ug_regs->ifctl,
614 in_be32(&ugeth->ug_regs->ifctl));
616 (u32) & ugeth->ug_regs->ifstat,
617 in_be32(&ugeth->ug_regs->ifstat));
619 (u32) & ugeth->ug_regs->macstnaddr1,
620 in_be32(&ugeth->ug_regs->macstnaddr1));
622 (u32) & ugeth->ug_regs->macstnaddr2,
623 in_be32(&ugeth->ug_regs->macstnaddr2));
625 (u32) & ugeth->ug_regs->uempr,
626 in_be32(&ugeth->ug_regs->uempr));
628 (u32) & ugeth->ug_regs->utbipar,
629 in_be32(&ugeth->ug_regs->utbipar));
631 (u32) & ugeth->ug_regs->uescr,
632 in_be16(&ugeth->ug_regs->uescr));
634 (u32) & ugeth->ug_regs->tx64,
635 in_be32(&ugeth->ug_regs->tx64));
637 (u32) & ugeth->ug_regs->tx127,
638 in_be32(&ugeth->ug_regs->tx127));
640 (u32) & ugeth->ug_regs->tx255,
641 in_be32(&ugeth->ug_regs->tx255));
643 (u32) & ugeth->ug_regs->rx64,
644 in_be32(&ugeth->ug_regs->rx64));
646 (u32) & ugeth->ug_regs->rx127,
647 in_be32(&ugeth->ug_regs->rx127));
649 (u32) & ugeth->ug_regs->rx255,
650 in_be32(&ugeth->ug_regs->rx255));
652 (u32) & ugeth->ug_regs->txok,
653 in_be32(&ugeth->ug_regs->txok));
655 (u32) & ugeth->ug_regs->txcf,
656 in_be16(&ugeth->ug_regs->txcf));
658 (u32) & ugeth->ug_regs->tmca,
659 in_be32(&ugeth->ug_regs->tmca));
661 (u32) & ugeth->ug_regs->tbca,
662 in_be32(&ugeth->ug_regs->tbca));
664 (u32) & ugeth->ug_regs->rxfok,
665 in_be32(&ugeth->ug_regs->rxfok));
667 (u32) & ugeth->ug_regs->rxbok,
668 in_be32(&ugeth->ug_regs->rxbok));
670 (u32) & ugeth->ug_regs->rbyt,
671 in_be32(&ugeth->ug_regs->rbyt));
673 (u32) & ugeth->ug_regs->rmca,
674 in_be32(&ugeth->ug_regs->rmca));
676 (u32) & ugeth->ug_regs->rbca,
677 in_be32(&ugeth->ug_regs->rbca));
679 (u32) & ugeth->ug_regs->scar,
680 in_be32(&ugeth->ug_regs->scar));
682 (u32) & ugeth->ug_regs->scam,
683 in_be32(&ugeth->ug_regs->scam));
1335 struct ucc_geth __iomem *ug_regs;
1344 ug_regs = ugeth->ug_regs;
1348 maccfg2 = in_be32(&ug_regs->maccfg2);
1356 out_be32(&ug_regs->maccfg2, maccfg2);
1409 init_check_frame_length_mode(ug_info->lengthCheckRx, &ug_regs->maccfg2);
1411 ret_val = init_preamble_length(ug_info->prel, &ug_regs->maccfg2);
1603 struct ucc_geth __iomem *ug_regs;
1608 ug_regs = ugeth->ug_regs;
1612 u32 tempval = in_be32(&ug_regs->maccfg2);
1677 out_be32(&ug_regs->maccfg2, tempval);
1991 if (ugeth->ug_regs) {
1992 iounmap(ugeth->ug_regs);
1993 ugeth->ug_regs = NULL;
2048 struct ucc_geth __iomem *ug_regs = ugeth->ug_regs;
2066 clrbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX);
2202 ugeth->ug_regs = ioremap(uf_info->regs, sizeof(*ugeth->ug_regs));
2203 if (!ugeth->ug_regs) {
2222 struct ucc_geth __iomem *ug_regs;
2239 ug_regs = ugeth->ug_regs;
2301 &ug_regs->maccfg1, &ug_regs->maccfg2);
2319 &ug_regs->uempr, &ug_regs->maccfg1);
2321 setbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX);
2330 &ug_regs->ipgifg);
2347 &ug_regs->hafdup);
2358 ifstat = in_be32(&ug_regs->ifstat);
2362 out_be32(&ug_regs->uempr, 0);
2368 0, &uf_regs->upsmr, &ug_regs->uescr);
3426 &ugeth->ug_regs->macstnaddr1,
3427 &ugeth->ug_regs->macstnaddr2);
3470 &ugeth->ug_regs->macstnaddr1,
3471 &ugeth->ug_regs->macstnaddr2);
3623 setbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE);
3644 clrbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE);