Lines Matching refs:W16
73 #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
75 #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
76 #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
182 W16(ep, sen_gaddr1, 0);
183 W16(ep, sen_gaddr2, 0);
184 W16(ep, sen_gaddr3, 0);
185 W16(ep, sen_gaddr4, 0);
198 W16(ep, sen_taddrh, taddrh);
199 W16(ep, sen_taddrm, taddrm);
200 W16(ep, sen_taddrl, taddrl);
217 W16(ep, sen_gaddr1, 0xffff);
218 W16(ep, sen_gaddr2, 0xffff);
219 W16(ep, sen_gaddr3, 0xffff);
220 W16(ep, sen_gaddr4, 0xffff);
259 W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
260 W16(ep, sen_genscc.scc_tbase,
277 W16(ep, sen_genscc.scc_mrblr, 0x5f0);
288 W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
289 W16(ep, sen_retlim, 15); /* Retry limit threshold */
291 W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
293 W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
295 W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
296 W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
300 W16(ep, sen_gaddr1, 0);
301 W16(ep, sen_gaddr2, 0);
302 W16(ep, sen_gaddr3, 0);
303 W16(ep, sen_gaddr4, 0);
304 W16(ep, sen_iaddr1, 0);
305 W16(ep, sen_iaddr2, 0);
306 W16(ep, sen_iaddr3, 0);
307 W16(ep, sen_iaddr4, 0);
316 W16(ep, sen_paddrh, paddrh);
317 W16(ep, sen_paddrm, paddrm);
318 W16(ep, sen_paddrl, paddrl);
320 W16(ep, sen_pper, 0);
321 W16(ep, sen_taddrl, 0);
322 W16(ep, sen_taddrm, 0);
323 W16(ep, sen_taddrh, 0);
329 W16(sccp, scc_scce, 0xffff);
333 W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
345 W16(sccp, scc_dsr, 0xd555);
350 W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
371 W16(sccp, scc_sccm, 0);
382 W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
424 W16(sccp, scc_scce, int_events & 0xffff);