Lines Matching defs:pcf
28 int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
34 if (WARN_ON(pcf->irq_handler[irq].handler))
37 mutex_lock(&pcf->lock);
38 pcf->irq_handler[irq].handler = handler;
39 pcf->irq_handler[irq].data = data;
40 mutex_unlock(&pcf->lock);
46 int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
51 mutex_lock(&pcf->lock);
52 pcf->irq_handler[irq].handler = NULL;
53 mutex_unlock(&pcf->lock);
59 static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
68 pcf50633_reg_set_bit_mask(pcf, reg, bit, mask ? bit : 0);
70 mutex_lock(&pcf->lock);
73 pcf->mask_regs[idx] |= bit;
75 pcf->mask_regs[idx] &= ~bit;
77 mutex_unlock(&pcf->lock);
82 int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
84 dev_dbg(pcf->dev, "Masking IRQ %d\n", irq);
86 return __pcf50633_irq_mask_set(pcf, irq, 1);
90 int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
92 dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq);
94 return __pcf50633_irq_mask_set(pcf, irq, 0);
98 int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
105 return pcf->mask_regs[reg] & bits;
109 static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
111 if (pcf->irq_handler[irq].handler)
112 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
120 struct pcf50633 *pcf = data;
125 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
128 dev_err(pcf->dev, "Error reading INT registers\n");
138 pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04);
143 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
152 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
159 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
165 if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
166 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
167 pcf->onkey1s_held);
168 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
169 if (pcf->pdata->force_shutdown)
170 pcf->pdata->force_shutdown(pcf);
174 dev_info(pcf->dev, "ONKEY1S held\n");
175 pcf->onkey1s_held = 1 ;
178 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
182 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
186 if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
187 pcf->onkey1s_held = 0;
190 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
191 pcf50633_reg_set_bit_mask(pcf,
196 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
197 pcf50633_reg_set_bit_mask(pcf,
204 if (pcf->is_suspended) {
205 pcf->is_suspended = 0;
209 pcf->resume_reason[i] = pcf_int[i] &
210 pcf->pdata->resumers[i];
219 pcf_int[i] &= ~pcf->mask_regs[i];
223 pcf50633_irq_call_handler(pcf, (i * 8) + j);
232 int pcf50633_irq_suspend(struct pcf50633 *pcf)
241 disable_irq(pcf->irq);
244 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
245 ARRAY_SIZE(pcf->suspend_irq_masks),
246 pcf->suspend_irq_masks);
248 dev_err(pcf->dev, "error saving irq masks\n");
254 res[i] = ~pcf->pdata->resumers[i];
256 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
259 dev_err(pcf->dev, "error writing wakeup irq masks\n");
263 pcf->is_suspended = 1;
269 int pcf50633_irq_resume(struct pcf50633 *pcf)
274 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
275 ARRAY_SIZE(pcf->suspend_irq_masks),
276 pcf->suspend_irq_masks);
278 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
280 enable_irq(pcf->irq);
287 int pcf50633_irq_init(struct pcf50633 *pcf, int irq)
291 pcf->irq = irq;
294 pcf->mask_regs[0] = 0x80;
295 pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
296 pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
297 pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
298 pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
299 pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
303 "pcf50633", pcf);
306 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
309 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
315 void pcf50633_irq_free(struct pcf50633 *pcf)
317 free_irq(pcf->irq, pcf);