Lines Matching refs:cfg
22 u32 cfg;
24 cfg = readl(dev->regs + S5P_CISRCFMT);
25 cfg |= S5P_CISRCFMT_ITU601_8BIT;
26 writel(cfg, dev->regs + S5P_CISRCFMT);
29 cfg = readl(dev->regs + S5P_CIGCTRL);
30 cfg |= (S5P_CIGCTRL_SWRST | S5P_CIGCTRL_IRQ_LEVEL);
31 writel(cfg, dev->regs + S5P_CIGCTRL);
34 cfg = readl(dev->regs + S5P_CIGCTRL);
35 cfg &= ~S5P_CIGCTRL_SWRST;
36 writel(cfg, dev->regs + S5P_CIGCTRL);
42 u32 cfg, flip;
45 cfg = readl(dev->regs + S5P_CITRGFMT);
46 cfg &= ~(S5P_CITRGFMT_INROT90 | S5P_CITRGFMT_OUTROT90);
58 cfg |= S5P_CITRGFMT_INROT90;
62 cfg |= S5P_CITRGFMT_OUTROT90;
64 cfg |= S5P_CITRGFMT_FLIP_180;
70 cfg |= S5P_CITRGFMT_FLIP_180;
74 writel(cfg, dev->regs + S5P_CITRGFMT);
119 u32 cfg;
126 cfg = readl(dev->regs + S5P_CITRGFMT);
127 cfg &= ~(S5P_CITRGFMT_FMT_MASK | S5P_CITRGFMT_HSIZE_MASK |
134 cfg |= S5P_CITRGFMT_RGB;
137 cfg |= S5P_CITRGFMT_YCBCR420;
144 cfg |= S5P_CITRGFMT_YCBCR422_1P;
146 cfg |= S5P_CITRGFMT_YCBCR422;
152 cfg |= S5P_CITRGFMT_HSIZE(frame->width);
153 cfg |= S5P_CITRGFMT_VSIZE(frame->height);
156 cfg &= ~S5P_CITRGFMT_FLIP_MASK;
157 cfg |= fimc_hw_get_target_flip(ctx->flip);
159 writel(cfg, dev->regs + S5P_CITRGFMT);
161 cfg = readl(dev->regs + S5P_CITAREA) & ~S5P_CITAREA_MASK;
162 cfg |= (frame->width * frame->height);
163 writel(cfg, dev->regs + S5P_CITAREA);
170 u32 cfg = 0;
173 cfg |= S5P_ORIG_SIZE_HOR(frame->f_height);
174 cfg |= S5P_ORIG_SIZE_VER(frame->f_width);
176 cfg |= S5P_ORIG_SIZE_HOR(frame->f_width);
177 cfg |= S5P_ORIG_SIZE_VER(frame->f_height);
179 writel(cfg, dev->regs + S5P_ORGOSIZE);
184 u32 cfg;
190 cfg = 0;
191 cfg |= S5P_CIO_OFFS_HOR(offset->y_h);
192 cfg |= S5P_CIO_OFFS_VER(offset->y_v);
193 writel(cfg, dev->regs + S5P_CIOYOFF);
195 cfg = 0;
196 cfg |= S5P_CIO_OFFS_HOR(offset->cb_h);
197 cfg |= S5P_CIO_OFFS_VER(offset->cb_v);
198 writel(cfg, dev->regs + S5P_CIOCBOFF);
200 cfg = 0;
201 cfg |= S5P_CIO_OFFS_HOR(offset->cr_h);
202 cfg |= S5P_CIO_OFFS_VER(offset->cr_v);
203 writel(cfg, dev->regs + S5P_CIOCROFF);
208 cfg = readl(dev->regs + S5P_CIOCTRL);
210 cfg &= ~(S5P_CIOCTRL_ORDER2P_MASK | S5P_CIOCTRL_ORDER422_MASK |
214 cfg |= ctx->out_order_1p;
216 cfg |= ctx->out_order_2p | S5P_CIOCTRL_YCBCR_2PLANE;
218 cfg |= S5P_CIOCTRL_YCBCR_3PLANE;
220 writel(cfg, dev->regs + S5P_CIOCTRL);
225 u32 cfg = readl(dev->regs + S5P_ORGISIZE);
227 cfg |= S5P_CIREAL_ISIZE_AUTOLOAD_EN;
229 cfg &= ~S5P_CIREAL_ISIZE_AUTOLOAD_EN;
230 writel(cfg, dev->regs + S5P_ORGISIZE);
236 u32 cfg;
240 cfg = readl(dev->regs + S5P_CIOCTRL);
242 cfg |= S5P_CIOCTRL_LASTIRQ_ENABLE;
244 cfg &= ~S5P_CIOCTRL_LASTIRQ_ENABLE;
245 writel(cfg, dev->regs + S5P_CIOCTRL);
254 u32 cfg = 0, shfactor;
258 cfg |= S5P_CISCPRERATIO_SHFACTOR(shfactor);
259 cfg |= S5P_CISCPRERATIO_HOR(sc->pre_hratio);
260 cfg |= S5P_CISCPRERATIO_VER(sc->pre_vratio);
261 writel(cfg, dev->regs + S5P_CISCPRERATIO);
263 cfg = 0;
264 cfg |= S5P_CISCPREDST_WIDTH(sc->pre_dst_width);
265 cfg |= S5P_CISCPREDST_HEIGHT(sc->pre_dst_height);
266 writel(cfg, dev->regs + S5P_CISCPREDST);
275 u32 cfg = 0;
278 cfg |= (S5P_CISCCTRL_CSCR2Y_WIDE | S5P_CISCCTRL_CSCY2R_WIDE);
281 cfg |= S5P_CISCCTRL_SCALERBYPASS;
284 cfg |= S5P_CISCCTRL_SCALEUP_H;
287 cfg |= S5P_CISCCTRL_SCALEUP_V;
290 cfg |= S5P_CISCCTRL_ONE2ONE;
295 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB565;
297 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB666;
299 cfg |= S5P_CISCCTRL_INRGB_FMT_RGB888;
304 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB565;
306 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB666;
308 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888;
310 cfg |= S5P_CISCCTRL_OUTRGB_FMT_RGB888;
313 cfg |= S5P_CISCCTRL_INTERLACE;
319 cfg |= S5P_CISCCTRL_SC_HORRATIO(sc->main_hratio);
320 cfg |= S5P_CISCCTRL_SC_VERRATIO(sc->main_vratio);
322 writel(cfg, dev->regs + S5P_CISCCTRL);
328 u32 cfg;
330 cfg = readl(dev->regs + S5P_CIIMGCPT);
333 cfg |= S5P_CIIMGCPT_CPT_FREN_ENABLE;
335 cfg &= ~S5P_CIIMGCPT_CPT_FREN_ENABLE;
338 cfg |= S5P_CIIMGCPT_IMGCPTEN_SC;
340 writel(cfg | S5P_CIIMGCPT_IMGCPTEN, dev->regs + S5P_CIIMGCPT);
347 u32 cfg = (S5P_CIIMGEFF_IE_ENABLE | S5P_CIIMGEFF_IE_SC_AFTER);
349 cfg |= effect->type;
352 cfg |= S5P_CIIMGEFF_PAT_CB(effect->pat_cb);
353 cfg |= S5P_CIIMGEFF_PAT_CR(effect->pat_cr);
356 writel(cfg, dev->regs + S5P_CIIMGEFF);
383 u32 cfg = 0;
386 cfg |= S5P_CIO_OFFS_HOR(offset->y_h);
387 cfg |= S5P_CIO_OFFS_VER(offset->y_v);
388 writel(cfg, dev->regs + S5P_CIIYOFF);
390 cfg = 0;
391 cfg |= S5P_CIO_OFFS_HOR(offset->cb_h);
392 cfg |= S5P_CIO_OFFS_VER(offset->cb_v);
393 writel(cfg, dev->regs + S5P_CIICBOFF);
395 cfg = 0;
396 cfg |= S5P_CIO_OFFS_HOR(offset->cr_h);
397 cfg |= S5P_CIO_OFFS_VER(offset->cr_v);
398 writel(cfg, dev->regs + S5P_CIICROFF);
407 cfg = readl(dev->regs + S5P_MSCTRL);
408 cfg &= ~(S5P_MSCTRL_FLIP_MASK
415 cfg |= (S5P_MSCTRL_FRAME_COUNT(1) | S5P_MSCTRL_INPUT_MEMORY);
421 cfg |= S5P_MSCTRL_INFORMAT_RGB;
424 cfg |= S5P_MSCTRL_INFORMAT_YCBCR420;
427 cfg |= ctx->in_order_2p | S5P_MSCTRL_C_INT_IN_2PLANE;
429 cfg |= S5P_MSCTRL_C_INT_IN_3PLANE;
437 cfg |= ctx->in_order_1p
440 cfg |= S5P_MSCTRL_INFORMAT_YCBCR422;
443 cfg |= ctx->in_order_2p
446 cfg |= S5P_MSCTRL_C_INT_IN_3PLANE;
458 cfg |= fimc_hw_get_in_flip(ctx->flip);
460 writel(cfg, dev->regs + S5P_MSCTRL);
463 cfg = readl(dev->regs + S5P_CIDMAPARAM);
464 cfg &= ~S5P_CIDMAPARAM_TILE_MASK;
467 cfg |= S5P_CIDMAPARAM_R_64X32;
470 cfg |= S5P_CIDMAPARAM_W_64X32;
472 writel(cfg, dev->regs + S5P_CIDMAPARAM);
480 u32 cfg = readl(dev->regs + S5P_MSCTRL);
481 cfg &= ~S5P_MSCTRL_INPUT_MASK;
484 cfg |= S5P_MSCTRL_INPUT_MEMORY;
486 cfg |= S5P_MSCTRL_INPUT_EXTCAM;
488 writel(cfg, dev->regs + S5P_MSCTRL);
495 u32 cfg = readl(dev->regs + S5P_CISCCTRL);
496 cfg &= ~S5P_CISCCTRL_LCDPATHEN_FIFO;
498 cfg |= S5P_CISCCTRL_LCDPATHEN_FIFO;
499 writel(cfg, dev->regs + S5P_CISCCTRL);
504 u32 cfg = 0;
506 cfg = readl(dev->regs + S5P_CIREAL_ISIZE);
507 cfg |= S5P_CIREAL_ISIZE_ADDR_CH_DIS;
508 writel(cfg, dev->regs + S5P_CIREAL_ISIZE);
514 cfg &= ~S5P_CIREAL_ISIZE_ADDR_CH_DIS;
515 writel(cfg, dev->regs + S5P_CIREAL_ISIZE);