Lines Matching refs:l64781_writereg
52 static int l64781_writereg (struct l64781_state* state, u8 reg, u8 data)
82 l64781_writereg (state, 0x2a, 0x00);
83 l64781_writereg (state, 0x2a, 0x01);
90 l64781_writereg (state, 0x2a, 0x02);
98 l64781_writereg (state, 0x07, 0x9e); /* stall AFC */
99 l64781_writereg (state, 0x08, 0); /* AFC INIT FREQ */
100 l64781_writereg (state, 0x09, 0);
101 l64781_writereg (state, 0x0a, 0);
102 l64781_writereg (state, 0x07, 0x8e);
103 l64781_writereg (state, 0x0e, 0); /* AGC gain to zero in beginning */
104 l64781_writereg (state, 0x11, 0x80); /* stall TIM */
105 l64781_writereg (state, 0x10, 0); /* TIM_OFFSET_LSB */
106 l64781_writereg (state, 0x12, 0);
107 l64781_writereg (state, 0x13, 0);
108 l64781_writereg (state, 0x11, 0x00);
207 l64781_writereg (state, 0x04, val0x04);
208 l64781_writereg (state, 0x05, val0x05);
209 l64781_writereg (state, 0x06, val0x06);
214 l64781_writereg (state, 0x15,
216 l64781_writereg (state, 0x16, init_freq & 0xff);
217 l64781_writereg (state, 0x17, (init_freq >> 8) & 0xff);
218 l64781_writereg (state, 0x18, (init_freq >> 16) & 0xff);
220 l64781_writereg (state, 0x1b, spi_bias & 0xff);
221 l64781_writereg (state, 0x1c, (spi_bias >> 8) & 0xff);
222 l64781_writereg (state, 0x1d, ((spi_bias >> 16) & 0x7f) |
225 l64781_writereg (state, 0x22, ddfs_offset_fixed & 0xff);
226 l64781_writereg (state, 0x23, (ddfs_offset_fixed >> 8) & 0x3f);
428 return l64781_writereg (state, 0x3e, 0x5a);
438 l64781_writereg (state, 0x3e, 0xa5);
441 l64781_writereg (state, 0x2a, 0x04);
442 l64781_writereg (state, 0x2a, 0x00);
446 l64781_writereg (state, 0x07, 0x8e);
449 l64781_writereg (state, 0x0b, 0x81);
452 l64781_writereg (state, 0x0c, 0x84);
455 l64781_writereg (state, 0x0d, 0x8c);
460 /*l64781_writereg (state, 0x19, 0x92);*/
463 l64781_writereg (state, 0x1e, 0x09);
535 l64781_writereg (state, 0x3e, 0x5a);
544 l64781_writereg (state, 0x3e, 0xa5);
559 l64781_writereg (state, 0x3e, reg0x3e); /* restore reg 0x3e */