Lines Matching refs:ohci
48 static inline u8 __init get_phy_reg(struct ti_ohci *ohci, u8 addr)
53 reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | 0x00008000);
56 if (reg_read(ohci, OHCI1394_PhyControl) & 0x80000000)
60 r = reg_read(ohci, OHCI1394_PhyControl);
66 static inline void __init set_phy_reg(struct ti_ohci *ohci, u8 addr, u8 data)
70 reg_write(ohci, OHCI1394_PhyControl, (addr << 8) | data | 0x00004000);
73 u32 r = reg_read(ohci, OHCI1394_PhyControl);
81 static inline void __init init_ohci1394_soft_reset(struct ti_ohci *ohci) {
84 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset);
87 if (!(reg_read(ohci, OHCI1394_HCControlSet)
95 static inline void __init init_ohci1394_initialize(struct ti_ohci *ohci)
101 bus_options = reg_read(ohci, OHCI1394_BusOptions);
105 reg_write(ohci, OHCI1394_BusOptions, bus_options);
108 reg_write(ohci, OHCI1394_NodeID, 0x0000ffc0);
111 reg_write(ohci, OHCI1394_HCControlSet,
115 reg_write(ohci, OHCI1394_LinkControlClear, 0xffffffff);
118 reg_write(ohci, OHCI1394_LinkControlSet,
122 reg_write(ohci, OHCI1394_LinkControlClear, 0x00000400);
125 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 0xffffffff);
126 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 0xffffffff);
127 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 0xffffffff);
128 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 0xffffffff);
131 reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0x80000000);
134 reg_write(ohci, OHCI1394_ATRetries,
140 reg_write(ohci, OHCI1394_HCControlClear, OHCI1394_HCControl_noByteSwap);
143 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_linkEnable);
146 num_ports = get_phy_reg(ohci, 2) & 0xf;
150 set_phy_reg(ohci, 7, i);
151 status = get_phy_reg(ohci, 8);
154 set_phy_reg(ohci, 8, status & ~1);
167 static inline void __init init_ohci1394_wait_for_busresets(struct ti_ohci *ohci)
173 events = reg_read(ohci, OHCI1394_IntEventSet);
175 reg_write(ohci, OHCI1394_IntEventClear,
196 static inline void __init init_ohci1394_reset_and_init_dma(struct ti_ohci *ohci)
199 init_ohci1394_soft_reset(ohci);
202 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_LPS);
205 reg_write(ohci, OHCI1394_IntEventClear, 0xffffffff);
206 reg_write(ohci, OHCI1394_IntMaskClear, 0xffffffff);
210 init_ohci1394_initialize(ohci);
215 init_ohci1394_wait_for_busresets(ohci);
218 init_ohci1394_enable_physical_dma(ohci);
228 struct ti_ohci ohci;
238 ohci.registers = (void *)fix_to_virt(FIX_OHCI1394_BASE);
240 init_ohci1394_reset_and_init_dma(&ohci);