Lines Matching refs:PACKET0
183 radeon_ring_write(rdev, PACKET0(R300_RE_SCISSORS_TL, 0));
185 radeon_ring_write(rdev, PACKET0(R300_RE_SCISSORS_BR, 0));
188 radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
190 radeon_ring_write(rdev, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
193 radeon_ring_write(rdev, PACKET0(RADEON_WAIT_UNTIL, 0));
197 radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
200 radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
203 radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
205 radeon_ring_write(rdev, PACKET0(RADEON_GEN_INT_STATUS, 0));
236 radeon_ring_write(rdev, PACKET0(RADEON_ISYNC_CNTL, 0));
242 radeon_ring_write(rdev, PACKET0(R300_GB_TILE_CONFIG, 0));
244 radeon_ring_write(rdev, PACKET0(RADEON_WAIT_UNTIL, 0));
248 radeon_ring_write(rdev, PACKET0(R300_DST_PIPE_CONFIG, 0));
250 radeon_ring_write(rdev, PACKET0(R300_GB_SELECT, 0));
252 radeon_ring_write(rdev, PACKET0(R300_GB_ENABLE, 0));
254 radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
256 radeon_ring_write(rdev, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
258 radeon_ring_write(rdev, PACKET0(RADEON_WAIT_UNTIL, 0));
262 radeon_ring_write(rdev, PACKET0(R300_GB_AA_CONFIG, 0));
264 radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
266 radeon_ring_write(rdev, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
268 radeon_ring_write(rdev, PACKET0(R300_GB_MSPOS0, 0));
278 radeon_ring_write(rdev, PACKET0(R300_GB_MSPOS1, 0));
287 radeon_ring_write(rdev, PACKET0(R300_GA_ENHANCE, 0));
289 radeon_ring_write(rdev, PACKET0(R300_GA_POLY_MODE, 0));
292 radeon_ring_write(rdev, PACKET0(R300_GA_ROUND_MODE, 0));