Lines Matching refs:tgpio
55 struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
58 spin_lock(&tgpio->lock);
59 reg = ioread32(tgpio->membase + offset);
66 iowrite32(reg, tgpio->membase + offset);
67 spin_unlock(&tgpio->lock);
79 struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
82 value = ioread32(tgpio->membase + TGPIOVAL);
100 struct timbgpio *tgpio = container_of(gpio, struct timbgpio, gpio);
102 if (tgpio->irq_base <= 0)
105 return tgpio->irq_base + offset;
113 struct timbgpio *tgpio = get_irq_chip_data(irq);
114 int offset = irq - tgpio->irq_base;
116 timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 0);
121 struct timbgpio *tgpio = get_irq_chip_data(irq);
122 int offset = irq - tgpio->irq_base;
124 timbgpio_update_bit(&tgpio->gpio, offset, TGPIO_IER, 1);
129 struct timbgpio *tgpio = get_irq_chip_data(irq);
130 int offset = irq - tgpio->irq_base;
136 if (offset < 0 || offset > tgpio->gpio.ngpio)
139 ver = ioread32(tgpio->membase + TGPIO_VER);
141 spin_lock_irqsave(&tgpio->lock, flags);
143 lvr = ioread32(tgpio->membase + TGPIO_LVR);
144 flr = ioread32(tgpio->membase + TGPIO_FLR);
146 bflr = ioread32(tgpio->membase + TGPIO_BFLR);
175 iowrite32(lvr, tgpio->membase + TGPIO_LVR);
176 iowrite32(flr, tgpio->membase + TGPIO_FLR);
178 iowrite32(bflr, tgpio->membase + TGPIO_BFLR);
180 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);
183 spin_unlock_irqrestore(&tgpio->lock, flags);
189 struct timbgpio *tgpio = get_irq_data(irq);
194 ipr = ioread32(tgpio->membase + TGPIO_IPR);
195 iowrite32(ipr, tgpio->membase + TGPIO_ICR);
197 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio)
198 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset));
212 struct timbgpio *tgpio;
228 tgpio = kzalloc(sizeof(*tgpio), GFP_KERNEL);
229 if (!tgpio) {
233 tgpio->irq_base = pdata->irq_base;
235 spin_lock_init(&tgpio->lock);
243 tgpio->membase = ioremap(iomem->start, resource_size(iomem));
244 if (!tgpio->membase) {
249 gc = &tgpio->gpio;
258 gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL;
268 platform_set_drvdata(pdev, tgpio);
271 iowrite32(0x0, tgpio->membase + TGPIO_IER);
273 if (irq < 0 || tgpio->irq_base <= 0)
277 set_irq_chip_and_handler_name(tgpio->irq_base + i,
279 set_irq_chip_data(tgpio->irq_base + i, tgpio);
281 set_irq_flags(tgpio->irq_base + i, IRQF_VALID | IRQF_PROBE);
285 set_irq_data(irq, tgpio);
291 iounmap(tgpio->membase);
295 kfree(tgpio);
306 struct timbgpio *tgpio = platform_get_drvdata(pdev);
310 if (irq >= 0 && tgpio->irq_base > 0) {
313 set_irq_chip(tgpio->irq_base + i, NULL);
314 set_irq_chip_data(tgpio->irq_base + i, NULL);
321 err = gpiochip_remove(&tgpio->gpio);
325 iounmap(tgpio->membase);
327 kfree(tgpio);