Lines Matching defs:mtr
278 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8))
279 #define MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4)
280 #define MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4)
281 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2)
282 #define MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1)
283 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1)
284 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3)
285 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13)
286 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3)
287 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10)
961 int mtr;
964 mtr = pvt->b0_mtr[csrow >> 1];
966 mtr = pvt->b1_mtr[csrow >> 1];
968 return mtr;
973 static void decode_mtr(int slot_row, u16 mtr)
977 ans = MTR_DIMMS_PRESENT(mtr);
979 debugf2("\tMTR%d=0x%x: DIMMs are %s\n", slot_row, mtr,
984 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
985 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
986 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single");
987 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
988 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
994 int mtr;
998 mtr = determine_mtr(pvt, csrow, channel);
999 if (MTR_DIMMS_PRESENT(mtr)) {
1004 dinfo->dual_rank = MTR_DIMM_RANK(mtr);
1010 addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);
1012 addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);
1014 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);
1241 int mtr, mtr1;
1259 mtr = pvt->b0_mtr[csrow >> 1];
1263 if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1))
1283 if (MTR_DRAM_WIDTH(mtr))