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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/char/

Lines Matching refs:Byte_t

160 static Byte_t RData[RDATASIZE] = {
181 static Byte_t RRegData[RREGDATASIZE] = {
208 static Byte_t sBitMapClrTbl[8] = {
212 static Byte_t sBitMapSetTbl[8] = {
236 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode);
243 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
246 WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
251 int IRQNum, Byte_t Frequency, int PeriodicOnly);
2443 Byte_t Frequency: A flag identifying the frequency
2491 int IRQNum, Byte_t Frequency, int PeriodicOnly)
2518 sOutB(MudbacIO, (Byte_t) (io >> 6)); /* set up AIOP I/O in MUDBAC */
2563 Byte_t Frequency: A flag identifying the frequency
2611 WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
2673 Byte_t AiopID; /* ID byte from AIOP */
2700 static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2734 Byte_t *ChR;
2736 static Byte_t R[4];
2788 ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2789 ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2790 ChP->BaudDiv[2] = (Byte_t) brd9600;
2791 ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2794 ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2795 ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2800 ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2801 ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2806 ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2807 ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2812 ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2813 ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2818 ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2819 ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2824 ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2825 ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2833 sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT); /* apply reset Tx FIFO count */
2834 sOutB(ChP->Cmd, (Byte_t) ChanNum); /* remove reset Tx FIFO count */
2840 sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT); /* apply reset Rx FIFO count */
2841 sOutB(ChP->Cmd, (Byte_t) ChanNum); /* remove reset Rx FIFO count */
2878 Byte_t R[4];
2904 Byte_t Ch; /* channel number within AIOP */
2918 Ch = (Byte_t) sGetChanNum(ChP);
2946 Byte_t Ch; /* channel number within AIOP */
2960 Ch = (Byte_t) sGetChanNum(ChP);
2975 Byte_t Data; The transmit data byte
2983 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
2985 Byte_t DWBuf[4]; /* buffer for double word writes */
3047 Byte_t Mask; /* Interrupt Mask Register */
3050 ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3054 ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3091 Byte_t Mask; /* Interrupt Mask Register */
3094 ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3096 ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3105 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3117 Byte_t val;