Lines Matching refs:pp
552 struct nv_adma_port_priv *pp = ap->private_data;
553 void __iomem *mmio = pp->ctl_block;
557 if (pp->flags & NV_ADMA_PORT_REGISTER_MODE)
586 pp->flags |= NV_ADMA_PORT_REGISTER_MODE;
591 struct nv_adma_port_priv *pp = ap->private_data;
592 void __iomem *mmio = pp->ctl_block;
596 if (!(pp->flags & NV_ADMA_PORT_REGISTER_MODE))
599 WARN_ON(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE);
616 pp->flags &= ~NV_ADMA_PORT_REGISTER_MODE;
622 struct nv_adma_port_priv *pp = ap->private_data;
674 pp->flags &= ~NV_ADMA_ATAPI_SETUP_COMPLETE;
677 pp->flags |= NV_ADMA_ATAPI_SETUP_COMPLETE;
708 pci_set_dma_mask(pdev, pp->adma_dma_mask);
711 pp->adma_dma_mask);
714 pp->adma_dma_mask);
731 struct nv_adma_port_priv *pp = qc->ap->private_data;
732 return !(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE);
783 struct nv_adma_port_priv *pp = ap->private_data;
784 u8 flags = pp->cpb[cpb_num].resp_flags;
878 struct nv_adma_port_priv *pp = ap->private_data;
879 void __iomem *mmio = pp->ctl_block;
887 if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) {
895 if (pp->flags & NV_ADMA_PORT_REGISTER_MODE) {
911 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL);
989 struct nv_adma_port_priv *pp = host->ports[0]->private_data;
990 writel(notifier_clears[0], pp->notifier_clear_block);
991 pp = host->ports[1]->private_data;
992 writel(notifier_clears[1], pp->notifier_clear_block);
1002 struct nv_adma_port_priv *pp = ap->private_data;
1003 void __iomem *mmio = pp->ctl_block;
1008 if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
1024 struct nv_adma_port_priv *pp = ap->private_data;
1025 void __iomem *mmio = pp->ctl_block;
1030 if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
1042 struct nv_adma_port_priv *pp = ap->private_data;
1043 void __iomem *mmio = pp->ctl_block;
1046 if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) {
1067 pp = ap->host->ports[0]->private_data;
1068 writel(notifier_clears[0], pp->notifier_clear_block);
1069 pp = ap->host->ports[1]->private_data;
1070 writel(notifier_clears[1], pp->notifier_clear_block);
1075 struct nv_adma_port_priv *pp = qc->ap->private_data;
1077 if (pp->flags & NV_ADMA_PORT_REGISTER_MODE)
1084 struct nv_adma_port_priv *pp;
1108 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
1109 if (!pp)
1114 pp->ctl_block = mmio;
1115 pp->gen_block = ap->host->iomap[NV_MMIO_BAR] + NV_ADMA_GEN;
1116 pp->notifier_clear_block = pp->gen_block +
1126 pp->adma_dma_mask = *dev->dma_mask;
1139 pp->cpb = mem;
1140 pp->cpb_dma = mem_dma;
1151 pp->aprd = mem;
1152 pp->aprd_dma = mem_dma;
1154 ap->private_data = pp;
1160 pp->flags = NV_ADMA_PORT_REGISTER_MODE;
1182 struct nv_adma_port_priv *pp = ap->private_data;
1183 void __iomem *mmio = pp->ctl_block;
1192 struct nv_adma_port_priv *pp = ap->private_data;
1193 void __iomem *mmio = pp->ctl_block;
1209 struct nv_adma_port_priv *pp = ap->private_data;
1210 void __iomem *mmio = pp->ctl_block;
1214 writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
1215 writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
1221 pp->flags |= NV_ADMA_PORT_REGISTER_MODE;
1310 struct nv_adma_port_priv *pp = qc->ap->private_data;
1319 &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (si-5)];
1323 cpb->next_aprd = cpu_to_le64(((u64)(pp->aprd_dma + NV_ADMA_SGTBL_SZ * qc->tag)));
1330 struct nv_adma_port_priv *pp = qc->ap->private_data;
1334 if ((pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) ||
1347 struct nv_adma_port_priv *pp = qc->ap->private_data;
1348 struct nv_adma_cpb *cpb = &pp->cpb[qc->tag];
1353 BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) &&
1393 struct nv_adma_port_priv *pp = qc->ap->private_data;
1394 void __iomem *mmio = pp->ctl_block;
1412 BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) &&
1423 if (curr_ncq != pp->last_issue_ncq) {
1427 pp->last_issue_ncq = curr_ncq;
1633 struct nv_adma_port_priv *pp = ap->private_data;
1634 if (!(pp->flags & NV_ADMA_PORT_REGISTER_MODE)) {
1635 void __iomem *mmio = pp->ctl_block;
1642 u32 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL);
1655 struct nv_adma_cpb *cpb = &pp->cpb[i];
1670 pp->cpb[i].ctl_flags &= ~NV_CPB_CTL_CPB_VALID;
1689 struct nv_swncq_port_priv *pp = ap->private_data;
1690 struct defer_queue *dq = &pp->defer_queue;
1700 struct nv_swncq_port_priv *pp = ap->private_data;
1701 struct defer_queue *dq = &pp->defer_queue;
1717 struct nv_swncq_port_priv *pp = ap->private_data;
1719 pp->dhfis_bits = 0;
1720 pp->dmafis_bits = 0;
1721 pp->sdbfis_bits = 0;
1722 pp->ncq_flags = 0;
1727 struct nv_swncq_port_priv *pp = ap->private_data;
1728 struct defer_queue *dq = &pp->defer_queue;
1733 pp->qc_active = 0;
1734 pp->last_issue_tag = ATA_TAG_POISON;
1740 struct nv_swncq_port_priv *pp = ap->private_data;
1742 writew(fis, pp->irq_block);
1755 struct nv_swncq_port_priv *pp = ap->private_data;
1766 pp->qc_active, pp->defer_queue.defer_bits, pp->last_issue_tag,
1767 pp->dhfis_bits, pp->dmafis_bits, pp->sdbfis_bits);
1773 sactive = readl(pp->sactive_block);
1774 done_mask = pp->qc_active ^ sactive;
1779 if (pp->qc_active & (1 << i))
1788 (pp->dhfis_bits >> i) & 0x1,
1789 (pp->dmafis_bits >> i) & 0x1,
1790 (pp->sdbfis_bits >> i) & 0x1,
1928 struct nv_swncq_port_priv *pp;
1936 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
1937 if (!pp)
1940 pp->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ * ATA_MAX_QUEUE,
1941 &pp->prd_dma, GFP_KERNEL);
1942 if (!pp->prd)
1944 memset(pp->prd, 0, ATA_PRD_TBL_SZ * ATA_MAX_QUEUE);
1946 ap->private_data = pp;
1947 pp->sactive_block = ap->ioaddr.scr_addr + 4 * SCR_ACTIVE;
1948 pp->irq_block = mmio + NV_INT_STATUS_MCP55 + ap->port_no * 2;
1949 pp->tag_block = mmio + NV_NCQ_REG_MCP55 + ap->port_no * 2;
1971 struct nv_swncq_port_priv *pp = ap->private_data;
1975 prd = pp->prd + ATA_MAX_PRD * qc->tag;
2006 struct nv_swncq_port_priv *pp = ap->private_data;
2013 writel((1 << qc->tag), pp->sactive_block);
2014 pp->last_issue_tag = qc->tag;
2015 pp->dhfis_bits &= ~(1 << qc->tag);
2016 pp->dmafis_bits &= ~(1 << qc->tag);
2017 pp->qc_active |= (0x1 << qc->tag);
2030 struct nv_swncq_port_priv *pp = ap->private_data;
2037 if (!pp->qc_active)
2073 struct nv_swncq_port_priv *pp = ap->private_data;
2094 sactive = readl(pp->sactive_block);
2095 done_mask = pp->qc_active ^ sactive;
2100 "(%08x->%08x)", pp->qc_active, sactive);
2112 pp->qc_active &= ~(1 << i);
2113 pp->dhfis_bits &= ~(1 << i);
2114 pp->dmafis_bits &= ~(1 << i);
2115 pp->sdbfis_bits |= (1 << i);
2125 if (pp->qc_active & pp->dhfis_bits)
2128 if ((pp->ncq_flags & ncq_saw_backout) ||
2129 (pp->qc_active ^ pp->dhfis_bits))
2138 ap->print_id, ap->qc_active, pp->qc_active,
2139 pp->defer_queue.defer_bits, pp->dhfis_bits,
2140 pp->dmafis_bits, pp->last_issue_tag);
2145 qc = ata_qc_from_tag(ap, pp->last_issue_tag);
2150 if (pp->defer_queue.defer_bits) {
2162 struct nv_swncq_port_priv *pp = ap->private_data;
2165 tag = readb(pp->tag_block) >> 2;
2175 struct nv_swncq_port_priv *pp = ap->private_data;
2189 iowrite32(pp->prd_dma + ATA_PRD_TBL_SZ * qc->tag,
2203 struct nv_swncq_port_priv *pp = ap->private_data;
2222 if (!pp->qc_active)
2243 pp->ncq_flags |= ncq_saw_backout;
2247 pp->ncq_flags |= ncq_saw_sdb;
2250 ap->print_id, pp->qc_active, pp->dhfis_bits,
2251 pp->dmafis_bits, readl(pp->sactive_block));
2260 pp->dhfis_bits |= (0x1 << pp->last_issue_tag);
2261 pp->ncq_flags |= ncq_saw_d2h;
2262 if (pp->ncq_flags & (ncq_saw_sdb | ncq_saw_backout)) {
2270 !(pp->ncq_flags & ncq_saw_dmas)) {
2275 if (pp->defer_queue.defer_bits) {
2287 pp->dmafis_bits |= (0x1 << nv_swncq_tag(ap));
2288 pp->ncq_flags |= ncq_saw_dmas;
2436 struct nv_adma_port_priv *pp;
2440 pp = host->ports[0]->private_data;
2441 if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
2447 pp = host->ports[1]->private_data;
2448 if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)