Lines Matching refs:timings
9 * slave timings, SITRE or PPE. In that sense it is a close relative
11 * although no other modes/timings. Also lacking is 32bit I/O on the ATA
30 * radisys_set_piomode - Initialize host controller PATA PIO timings
32 * @adev: Device whose timings we are configuring
55 u8 timings[][2] = { { 0, 0 }, /* Check me */
72 idetm_data |= (timings[pio][0] << 12) |
73 (timings[pio][1] << 8);
81 * radisys_set_dmamode - Initialize host controller PATA DMA timings
82 * @ap: Port whose timings we are configuring
98 u8 timings[][2] = { { 0, 0 },
105 * MWDMA is driven by the PIO timings. We must also enable
131 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
162 * this interface so that we can load the correct ATA timings if