Lines Matching defs:mreg
1387 unsigned long mreg = srmmu_get_mmureg();
1391 mreg &= ~(HYPERSPARC_CWENABLE);
1392 mreg |= (HYPERSPARC_CENABLE | HYPERSPARC_WBENABLE);
1393 mreg |= (HYPERSPARC_CMODE);
1395 srmmu_set_mmureg(mreg);
1438 unsigned long mreg = srmmu_get_mmureg();
1446 if (!(mreg & CYPRESS_CENABLE)) {
1471 mreg |= (CYPRESS_CENABLE | CYPRESS_CMODE);
1472 srmmu_set_mmureg(mreg);
1526 unsigned long mreg;
1532 mreg = srmmu_get_mmureg();
1533 mreg |= (SWIFT_IE | SWIFT_DE);
1543 mreg &= ~(SWIFT_BF);
1544 srmmu_set_mmureg(mreg);
1684 unsigned long mreg = srmmu_get_mmureg();
1689 mreg &= ~(TURBOSPARC_ICENABLE | TURBOSPARC_DCENABLE); /* Temporarily disable I & D caches */
1690 mreg &= ~(TURBOSPARC_PCENABLE); /* Don't check parity */
1691 srmmu_set_mmureg(mreg);
1717 mreg |= (TURBOSPARC_ICENABLE | TURBOSPARC_DCENABLE); /* I & D caches on */
1718 mreg |= (TURBOSPARC_ICSNOOP); /* Icache snooping on */
1719 srmmu_set_mmureg(mreg);
1747 unsigned long mreg = srmmu_get_mmureg();
1751 mreg &= ~TSUNAMI_ITD;
1752 mreg |= (TSUNAMI_IENAB | TSUNAMI_DENAB);
1753 srmmu_set_mmureg(mreg);
1789 unsigned long mreg = srmmu_get_mmureg();
1801 mreg |= VIKING_TCENABLE;
1805 mreg &= ~(VIKING_TCENABLE);
1817 mreg |= VIKING_SPENABLE;
1818 mreg |= (VIKING_ICENABLE | VIKING_DCENABLE);
1819 mreg |= VIKING_SBENABLE;
1820 mreg &= ~(VIKING_ACENABLE);
1821 srmmu_set_mmureg(mreg);
1826 unsigned long mreg = srmmu_get_mmureg();
1829 if(mreg & VIKING_MMODE) {
1919 unsigned long mreg, psr;
1925 mreg = srmmu_get_mmureg(); psr = get_psr();
1926 mod_typ = (mreg & 0xf0000000) >> 28;
1927 mod_rev = (mreg & 0x0f000000) >> 24;