Lines Matching refs:__SYSREG
20 #define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
57 #define P0IN __SYSREG(0xdb000004, u8) /* in reg */
58 #define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
60 #define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
79 #define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
106 #define P1IN __SYSREG(0xdb000104, u8) /* in reg */
107 #define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
108 #define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
121 #define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
142 #define P2IN __SYSREG(0xdb000204, u8) /* in reg */
143 #define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
144 #define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
147 #define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
169 #define P3IN __SYSREG(0xdb000304, u8) /* in reg */
170 #define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
173 #define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
207 #define P4IN __SYSREG(0xdb000404, u8) /* in reg */
208 #define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
211 #define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
227 #define P5IN __SYSREG(0xdb000504, u8) /* in reg */
228 #define P5OUT __SYSREG(0xdb000508, u8) /* out reg */