Lines Matching refs:dma_write
167 #define dma_write(val, reg) \
256 dma_write(ccr, CCR(lch));
270 dma_write(l, CSDP(lch));
279 dma_write(ccr, CCR(lch));
285 dma_write(ccr, CCR2(lch));
316 dma_write(val, CCR(lch));
319 dma_write(elem_count, CEN(lch));
320 dma_write(frame_count, CFN(lch));
346 dma_write(w, CCR2(lch));
352 dma_write((u16)color, COLOR_L(lch));
353 dma_write((u16)(color >> 16), COLOR_U(lch));
356 dma_write(w, LCH_CTRL(lch));
377 dma_write(val, CCR(lch));
380 dma_write(color, COLOR(lch));
393 dma_write(csdp, CSDP(lch));
406 dma_write(l, LCH_CTRL(lch));
424 dma_write(w, CSDP(lch));
430 dma_write(l, CCR(lch));
433 dma_write(src_start >> 16, CSSA_U(lch));
434 dma_write((u16)src_start, CSSA_L(lch));
438 dma_write(src_start, CSSA(lch));
440 dma_write(src_ei, CSEI(lch));
441 dma_write(src_fi, CSFI(lch));
469 dma_write(eidx, CSEI(lch));
470 dma_write(fidx, CSFI(lch));
482 dma_write(l, CSDP(lch));
527 dma_write(l, CSDP(lch));
542 dma_write(l, CSDP(lch));
548 dma_write(l, CCR(lch));
551 dma_write(dest_start >> 16, CDSA_U(lch));
552 dma_write(dest_start, CDSA_L(lch));
556 dma_write(dest_start, CDSA(lch));
558 dma_write(dst_ei, CDEI(lch));
559 dma_write(dst_fi, CDFI(lch));
568 dma_write(eidx, CDEI(lch));
569 dma_write(fidx, CDFI(lch));
581 dma_write(l, CSDP(lch));
623 dma_write(l, CSDP(lch));
635 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
638 dma_write(dma_chan[lch].enabled_irqs, CICR(lch));
644 dma_write(0, CICR(lch));
678 dma_write(l, CLNK_CTRL(lch));
689 dma_write(0, CICR(lch));
700 dma_write(l, CLNK_CTRL(lch));
715 dma_write(val, IRQENABLE_L0);
730 dma_write(val, IRQENABLE_L0);
795 dma_write(dev_id | (1 << 10), CCR(free_ch));
797 dma_write(dev_id, CCR(free_ch));
804 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(free_ch));
805 dma_write(1 << free_ch, IRQSTATUS_L0);
826 dma_write(0, CICR(lch));
828 dma_write(0, CCR(lch));
835 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
836 dma_write(1 << lch, IRQSTATUS_L0);
839 dma_write(0, CICR(lch));
842 dma_write(0, CCR(lch));
883 dma_write(reg, GCR);
913 dma_write(l, CCR(lch));
934 dma_write(l, CCR(lch));
960 dma_write(0, CPC(lch));
962 dma_write(0, CDAC(lch));
992 dma_write(lch, CLNK_CTRL(lch));
1004 dma_write(l, CCR(lch));
1016 dma_write(0, CICR(lch));
1029 dma_write(l , OCP_SYSCONFIG);
1033 dma_write(l, CCR(lch));
1047 dma_write(sys_cf, OCP_SYSCONFIG);
1050 dma_write(l, CCR(lch));
1195 dma_write(dma_read(CCR(lch_head)) | (3 << 8),
1222 dma_write(dma_read(CCR(lch_head)) & ~(3 << 8),
1278 dma_write(l, CLNK_CTRL(lch_head));
1283 dma_write(l, CLNK_CTRL(lch_queue));
1559 dma_write(src_start, CSSA(lch));
1561 dma_write(dest_start, CDSA(lch));
1564 dma_write(elem_count, CEN(lch));
1565 dma_write(frame_count, CFN(lch));
1626 dma_write(l, CCR(lch));
1631 dma_write(l, CCR(lch));
1685 dma_write(l, CCR(channels[0]));
1728 dma_write(l, OCP_SYSCONFIG);
1735 dma_write(l, CCR(channels[i]));
1748 dma_write(sys_cf, OCP_SYSCONFIG);
1938 dma_write(1 << ch, IRQSTATUS_L0);
1964 dma_write(ccr, CCR(ch));
1975 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch));
1976 dma_write(1 << ch, IRQSTATUS_L0);
1995 dma_write(status, CSR(ch));
2051 dma_write(omap_dma_global_context.dma_gcr, GCR);
2052 dma_write(omap_dma_global_context.dma_ocp_sysconfig,
2054 dma_write(omap_dma_global_context.dma_irqenable_l0,
2064 dma_write(0x3 , IRQSTATUS_L0);
2138 dma_write(w, GSCR);
2209 dma_write(v , OCP_SYSCONFIG);