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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/csp/tmr/

Lines Matching refs:pTmrHw

96 	pTmrHw[timerId].LoadValue = 0;
97 pTmrHw[timerId].CurrentValue = 0xFFFFFFFF;
98 pTmrHw[timerId].Control = 0;
99 pTmrHw[timerId].BackgroundLoad = 0;
101 pTmrHw[timerId].Control |= tmrHw_CONTROL_32BIT;
103 if (pTmrHw[timerId].RawInterruptStatus) {
104 pTmrHw[timerId].InterruptClear = 0xFFFFFFFF;
125 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
128 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
131 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
139 pTmrHw[timerId].LoadValue = count;
140 pTmrHw[timerId].BackgroundLoad = count;
144 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
147 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
150 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
158 pTmrHw[timerId].LoadValue = count;
159 pTmrHw[timerId].BackgroundLoad = count;
184 pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
185 pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
187 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
206 pTmrHw[timerId].LoadValue = count;
207 pTmrHw[timerId].BackgroundLoad = count;
231 pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
232 pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
256 pTmrHw[timerId].Control |= tmrHw_CONTROL_PERIODIC;
257 pTmrHw[timerId].Control |= tmrHw_CONTROL_ONESHOT;
279 pTmrHw[timerId].Control &= ~tmrHw_CONTROL_PERIODIC;
280 pTmrHw[timerId].Control &= ~tmrHw_CONTROL_ONESHOT;
283 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_256;
286 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_16;
289 pTmrHw[timerId].Control |= tmrHw_CONTROL_PRESCALE_1;
315 pTmrHw[timerId].Control |= tmrHw_CONTROL_TIMER_ENABLE;
332 pTmrHw[timerId].Control &= ~tmrHw_CONTROL_TIMER_ENABLE;
349 switch (pTmrHw[timerId].Control & tmrHw_CONTROL_MODE_MASK) {
351 if (pTmrHw[timerId].CurrentValue) {
352 return tmrHw_MAX_COUNT - pTmrHw[timerId].CurrentValue;
357 return pTmrHw[timerId].BackgroundLoad -
358 pTmrHw[timerId].CurrentValue;
377 switch (pTmrHw[timerId].Control & tmrHw_CONTROL_PRESCALE_MASK) {
411 pTmrHw[timerId].Control |= tmrHw_CONTROL_INTERRUPT_ENABLE;
426 pTmrHw[timerId].Control &= ~tmrHw_CONTROL_INTERRUPT_ENABLE;
443 pTmrHw[timerId].InterruptClear = 0x1;
457 if (pTmrHw[timerId].InterruptStatus) {
481 if (pTmrHw[i].InterruptStatus) {
503 pTmrHw[timerId].LoadValue);
505 pTmrHw[timerId].BackgroundLoad);
507 pTmrHw[timerId].Control);
509 pTmrHw[timerId].InterruptClear);
511 pTmrHw[timerId].RawInterruptStatus);
513 pTmrHw[timerId].InterruptStatus);